On 8/2/24 18:34, Ajeet Singh wrote:
From: Mark Corbin<mark.cor...@embecsom.com>

Added the 'target_cpu_set_tls' function to handle setting the Thread
Local Storage (TLS) register for the RISC-V architecture.

Signed-off-by: Mark Corbin<mark.cor...@embecsom.com>
Signed-off-by: Ajeet Singh<itac...@freebsd.org>
---
  bsd-user/riscv/target_arch_cpu.c | 29 +++++++++++++++++++++++++++++
  1 file changed, 29 insertions(+)
  create mode 100644 bsd-user/riscv/target_arch_cpu.c

Reviewed-by: Richard Henderson <richard.hender...@linaro.org>

r~

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