Zhaoxin and VIA CPUs handle the CMPLegacy bit in the same way
as Intel CPUs. This patch simplifies the existing logic by
using the IS_XXX_CPU macro and includes checks for Zhaoxin
and VIA vendors to align their behavior with Intel.
Signed-off-by: EwanHai <ewanhai...@zhaoxin.com>
---
target/i386/cpu.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 50edff077e..0836416617 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -6945,9 +6945,9 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
uint32_t count,
* So don't set it here for Intel to make Linux guests happy.
*/
if (threads_per_pkg > 1) {
- if (env->cpuid_vendor1 != CPUID_VENDOR_INTEL_1 ||
- env->cpuid_vendor2 != CPUID_VENDOR_INTEL_2 ||
- env->cpuid_vendor3 != CPUID_VENDOR_INTEL_3) {
+ if (!IS_INTEL_CPU(env) &&
+ !IS_ZHAOXIN_CPU(env) &&
+ !IS_VIA_CPU(env)) {
*ecx |= 1 << 1; /* CmpLegacy bit */
}
}
--
2.34.1
