On 5/27/24 19:43, Alistair Francis wrote:
The following changes since commit ad10b4badc1dd5b28305f9b9f1168cf0aa3ae946:
Merge tag 'pull-error-2024-05-27' ofhttps://repo.or.cz/qemu/armbru into
staging (2024-05-27 06:40:42 -0700)
are available in the Git repository at:
https://github.com/alistair23/qemu.git tags/pull-riscv-to-apply-20240528
for you to fetch changes up to 1806da76cb81088ea026ca3441551782b850e393:
target/riscv: raise an exception when CSRRS/CSRRC writes a read-only CSR
(2024-05-28 12:20:27 +1000)
----------------------------------------------------------------
RISC-V PR for 9.1
* APLICs add child earlier than realize
* Fix exposure of Zkr
* Raise exceptions on wrs.nto
* Implement SBI debug console (DBCN) calls for KVM
* Support 64-bit addresses for initrd
* Change RISCV_EXCP_SEMIHOST exception number to 63
* Tolerate KVM disable ext errors
* Set tval in breakpoints
* Add support for Zve32x extension
* Add support for Zve64x extension
* Relax vector register check in RISCV gdbstub
* Fix the element agnostic Vector function problem
* Fix Zvkb extension config
* Implement dynamic establishment of custom decoder
* Add th.sxstatus CSR emulation
* Fix Zvfhmin checking for vfwcvt.f.f.v and vfncvt.f.f.w instructions
* Check single width operator for vector fp widen instructions
* Check single width operator for vfncvt.rod.f.f.w
* Remove redudant SEW checking for vector fp narrow/widen instructions
* Prioritize pmp errors in raise_mmu_exception()
* Do not set mtval2 for non guest-page faults
* Remove experimental prefix from "B" extension
* Fixup CBO extension register calculation
* Fix the hart bit setting of AIA
* Fix reg_width in ricsv_gen_dynamic_vector_feature()
* Decode all of the pmpcfg and pmpaddr CSRs
* Raise an exception when CSRRS/CSRRC writes a read-only CSR
Fails testing:
https://gitlab.com/qemu-project/qemu/-/jobs/6953349448
ERROR:../tests/plugin/insn.c:58:vcpu_init: assertion failed: (count > 0)
timeout: the monitored command dumped core
Aborted
make[1]: *** [Makefile:178: run-plugin-catch-syscalls-with-libinsn.so] Error 134
make: *** [/builds/qemu-project/qemu/tests/Makefile.include:56:
run-tcg-tests-riscv64-linux-user] Error 2
#0 riscv_gdb_get_csr (cs=<optimized out>, buf=0x5555558e7f50, n=3072)
at ../src/target/riscv/gdbstub.c:183
#1 0x00007ffff7fb7841 in vcpu_init (id=<optimized out>,
vcpu_index=<optimized out>) at ../src/tests/plugin/insn.c:57
#2 0x000055555569ef1a in plugin_vcpu_cb__simple (cpu=0x5555558fb820,
ev=<optimized out>) at ../src/plugins/core.c:111
After
182 result = riscv_csrrw_debug(env, n, &val, 0, 0);
result == 2.
r~
