On Sat, 04 May 2024 17:25:52 +0900,
Michael Tokarev wrote:
>
> 06.04.2024 08:37, Richard Henderson wrote:
> > Zack's recent patches, tidied a little bit, and with
> > test cases added.
>
> These fixes ended up in stable-8.2, but not in stable-7.2.
> This is because in 7.2, the context is a bit different.
>
> Later, a couple other fixes in this area come from Philippe
> (Fix ADDV & SUBV opcodes) which are easy to pick up but it
> wants changes in tests/tcg/sh4/Makefile.target introduced
> in this patchset.
>
> b0f2f2976b "target/sh4: mac.w: memory accesses are 16-bit words"
> also needs 03a0d87e8d "target/sh4: Use MO_ALIGN where required",
> but this one, while simple, is a big one and doesn't apply to
> 7.2 directly in many places in target/sh4/translate.c, in parts
> due to bebd5cb300 "target/sh4: Drop tcg_temp_free" (but can be
> easily tweaked manually).
>
> Or I can hand-apply b0f2f2976b (s/MO_TESL/MO_TESW) without
> 03a0d87e8d (add MO_ALIGN).
>
> Does picking up this stuff for 7.2 make sense?
>
> (Cc'ing Cole for general stable-7.2 feedback on redhat side).
>
> Thanks,
>
> /mjt
>
> > Richard Henderson (1):
> > target/sh4: Merge mach and macl into a union
> >
> > Zack Buhman (3):
> > target/sh4: mac.w: memory accesses are 16-bit words
> > target/sh4: Fix mac.l with saturation enabled
> > target/sh4: Fix mac.w with saturation enabled
> >
> > target/sh4/cpu.h | 14 ++++++--
> > target/sh4/helper.h | 4 +--
> > target/sh4/op_helper.c | 51 +++++++++++++++-----------
> > target/sh4/translate.c | 4 +--
> > tests/tcg/sh4/test-macl.c | 67 +++++++++++++++++++++++++++++++++++
> > tests/tcg/sh4/test-macw.c | 61 +++++++++++++++++++++++++++++++
> > tests/tcg/sh4/Makefile.target | 8 +++++
> > 7 files changed, 182 insertions(+), 27 deletions(-)
> > create mode 100644 tests/tcg/sh4/test-macl.c
> > create mode 100644 tests/tcg/sh4/test-macw.c
> >
>
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Does this mean you changed it like this?
I think this is fine.
index 7db3468b01..f3bf0fc50a 100644
--- a/target/sh4/translate.c
+++ b/target/sh4/translate.c
@@ -844,9 +844,9 @@ static void _decode_opc(DisasContext * ctx)
{
TCGv arg0, arg1;
arg0 = tcg_temp_new();
- tcg_gen_qemu_ld_i32(arg0, REG(B7_4), ctx->memidx, MO_TESL);
+ tcg_gen_qemu_ld_i32(arg0, REG(B7_4), ctx->memidx, MO_TESW);
arg1 = tcg_temp_new();
- tcg_gen_qemu_ld_i32(arg1, REG(B11_8), ctx->memidx, MO_TESL);
+ tcg_gen_qemu_ld_i32(arg1, REG(B11_8), ctx->memidx, MO_TESW);
gen_helper_macw(cpu_env, arg0, arg1);
tcg_temp_free(arg1);
tcg_temp_free(arg0);
--
Yosinori Sato
