On 4/26/24 00:35, Xiong Yining wrote:
From: xiongyining1480 <xiongyining1...@phytium.com.cn>
Enable CPU cluster support on SbsaQemu platform, so that users can
specify a 4-level CPU hierarchy sockets/clusters/cores/threads. And
this topology can be passed to the firmware through DT cpu-map.
Signed-off-by: Xiong Yining <xiongyining1...@phytium.com.cn>
tested-by: Marcin Juszkiewicz <marcin.juszkiew...@linaro.org>
---
docs/system/arm/sbsa.rst | 4 ++++
hw/arm/sbsa-ref.c | 37 ++++++++++++++++++++++++++++++++++++-
2 files changed, 40 insertions(+), 1 deletion(-)
Isn't this basically what MPIDR_EL1 is supposed to indicate?
We do not yet implement all of that in QEMU, but should.
Why does the same info need to be replicated in devicetree?
r~
