On 4/12/24 04:36, Peter Maydell wrote:
+ 4) Disable the 512-bit vector length. This results in all the other
+ lengths supported by ``max`` defaulting to enabled
+ (128, 256, 1024 and 2048)::
+
+ $ qemu-system-aarch64 -M virt -cpu max,sve512=off
+
I just noticed this while I was trying to understand the
SME and SVE property documentation -- the example 4 here
is in the SME property examples section, but it's changing
sve512, not sme512. Is that an error, or intentional?
Error.
In the SME section we say that all other lengths default
to enabled, but in the SVE section we say that the
smaller lengths default to enabled but the longer
lengths are disabled. Is:
* the SVE part wrong?
* the SME part wrong?
* the behaviour deliberately different for SVE and SME
vector lengths? (If so, we should say so explicitly to
highlight that to users).
The behaviour is deliberately different.
See R_JRCSH and especially I_FQKMN:
For example, this means that the set of supported SVLs might be
discontiguous and might not start at the smallest permitted SVL.
whereas for SVE, the implementation is required to support all powers of 2 up to the
maximum (see e.g. the text for ZCR_EL3.LEN).
r~
