On Wed, 3 Apr 2024 at 11:17, Jinjie Ruan <ruanjin...@huawei.com> wrote: > > Add the NMIAR CPU interface registers which deal with acknowledging NMI. > > When introduce NMI interrupt, there are some updates to the semantics for the > register ICC_IAR1_EL1 and ICC_HPPIR1_EL1. For ICC_IAR1_EL1 register, it > should return 1022 if the intid has non-maskable property. And for > ICC_NMIAR1_EL1 register, it should return 1023 if the intid do not have > non-maskable property. Howerever, these are not necessary for ICC_HPPIR1_EL1 > register. > > And the APR and RPR has NMI bits which should be handled correctly. > > Signed-off-by: Jinjie Ruan <ruanjin...@huawei.com> > Reviewed-by: Richard Henderson <richard.hender...@linaro.org> > ---
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> thanks -- PMM
