Hello Aditya, Please run ./scripts/get_maintainer.pl when sending a series. qemu-ppc should be in Cc:
Briefly looking at this, please separate the changes using one patch per model, that is : first CPU (target), LPC, OCC, PSI, SBE, PnvCore, SpaprCore. Last the PnvChip and the machines, powernv11 and pseries. A minimum commit log describing the HW is required. I don't see PHB6 or XIVE3. Why ? Also, you will need an OPAL update. The above changes are pointless without it. The minimum for now is a git commit from the opal repo, then you will need to update QEMU with a binary. Thanks, C. On 4/1/24 07:55, Aditya Gupta wrote:
This patch series adds support for Power11 pseries and powernv machine targets to emulate VMs running on Power11. Most of the P11 support code has been taken from P10 code in QEMU. And has been tested in pseries, powernv, with and without compat mode. Git Tree for Testing: https://github.com/adi-g15-ibm/qemu/tree/p11 Aditya Gupta (2): ppc: pseries: add P11 cpu type ppc: powernv11: add base support for P11 PowerNV docs/system/ppc/pseries.rst | 6 +- hw/ppc/pnv.c | 409 ++++++++++++++++++++++++++++++++++++ hw/ppc/pnv_core.c | 94 +++++++++ hw/ppc/pnv_homer.c | 64 ++++++ hw/ppc/pnv_lpc.c | 14 ++ hw/ppc/pnv_occ.c | 14 ++ hw/ppc/pnv_psi.c | 21 ++ hw/ppc/pnv_sbe.c | 19 ++ hw/ppc/spapr_cpu_core.c | 1 + include/hw/ppc/pnv.h | 51 +++++ include/hw/ppc/pnv_chip.h | 30 +++ include/hw/ppc/pnv_homer.h | 3 + include/hw/ppc/pnv_lpc.h | 4 + include/hw/ppc/pnv_occ.h | 2 + include/hw/ppc/pnv_psi.h | 2 + include/hw/ppc/pnv_sbe.h | 2 + include/hw/ppc/pnv_xscom.h | 55 +++++ target/ppc/compat.c | 7 + target/ppc/cpu-models.c | 2 + target/ppc/cpu-models.h | 2 + target/ppc/cpu_init.c | 162 ++++++++++++++ 21 files changed, 961 insertions(+), 3 deletions(-)
