Richard Henderson <richard.hender...@linaro.org> writes: > On 3/23/24 22:09, Sven Schnelle wrote: >> The CPU seems to mask a few bits in the offset when running >> under HP-UX. ISR/IOR register contents for an address in >> the processor HPA (0xfffffffffffa0000) on my C8000 and J6750: >> running on Linux: 000000003fffffff c0000000fffa0500 >> running on HP-UX: 00000000301fffff c0000000fffa0500 >> I haven't found how this is switched (guess some diag in the >> firmware), but linux + seabios seems to handle that as well, >> so lets mask out the additional bits. >> Signed-off-by: Sven Schnelle <sv...@stackframe.org> >> [..] > [..] > Though my argument would suggest the mask should be 0xff for the > 40-bit physical address, which is not what you see at all, so perhaps > the thing is moot. I am at a loss to explain why or how HP-UX gets a > 7-bit hole in the ISR result. > > On the other hand, there are some not-well-documented shenanigans (aka > implementation defined behaviour) between Figure H-8 and Figure H-11, > where the 62-bit absolute address is expanded to a 64-bit logical > physical address and then compacted to a 40-bit implementation > physical address. > > We've already got hacks in place for this in hppa_abs_to_phys_pa2_w1, > which just truncates everything down to 40 bits. But that's probably > not what the processor is really doing.
I looked into this again, and it's caused by Space-ID hashing. HP-UX asks PDC/Firmware how many bits are used for the hashing. seabios returns zero, in which case HP-UX uses a default mask of 0xf01fffffffffffff. By modifying seabios, i can make HP-UX use the appropriate mask, but switching of SpaceID hashing entirely is impossible. The reason why the CPU doesn't strip the bits when running linux is that Linux switches of Space-ID hashing early in the startup code (before mm gets initialized). My J6750 Firmware only returns two values: 0 when Space-ID hashing is off, 0xfe0 when it is enabled. This is hardcoded in the firmware - the only thing PDC checks is a bit in Debug Register 2, which enables Space-ID hashing. 0xfe0 matches the 0xf01f... mask used by HP-UX pretty well. So if qemu wants to run 64 Bit HP-UX the proper way, i guess it needs to implement Space-ID hashing.