On Fri, Feb 16, 2024 at 6:50 AM Igor Lesik <lesiki...@meta.com> wrote:
>
> Hi,
>
> I have a situation when I need to use third-party 32-bit RISC-V CPU when rest 
> is all 64-bit RISC-V CPUs. I have seen that some steps were already made in 
> the direction to enable such configuration 
> (https://riscv.org/blog/2023/01/run-32-bit-applications-on-64-bit-linux-kernel-liu-zhiwei-guo-ren-t-head-division-of-alibaba-cloud/),
>  I am wondering if someone can shed more light on it.

I assume you want to model a number of 64-bit RISC-V CPUs and a 32-bit
RISC-V CPU (for power control of something like that) in QEMU?

That currently isn't possible. There are minimal efforts to support
creating and running a 32-bit RISC-V CPU with the 64-bit binary, but
that currently doesn't work. I don't think anyone is actively working
on it either. The next step of running both at the same time shouldn't
be too hard after that. It's already possible for 32/64-bit ARM CPUs.

Alistair

>
> Thanks,
> Igor
>

Reply via email to