Replace qemu_printf() by monitor_printf() in monitor.c.
Rename dump_mmu() as sparc_dump_mmu().
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
---
target/sparc/cpu.h | 2 +-
target/sparc/ldst_helper.c | 18 +++----
target/sparc/mmu_helper.c | 102 ++++++++++++++++++-------------------
target/sparc/monitor.c | 2 +-
4 files changed, 62 insertions(+), 62 deletions(-)
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index f3cdd17c62..55589c8ae4 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -601,7 +601,7 @@ bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int
size,
MMUAccessType access_type, int mmu_idx,
bool probe, uintptr_t retaddr);
target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev);
-void dump_mmu(CPUSPARCState *env);
+void sparc_dump_mmu(Monitor *mon, CPUSPARCState *env);
#if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY)
int sparc_cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
index 064390d1d4..44f8b2bb7a 100644
--- a/target/sparc/ldst_helper.c
+++ b/target/sparc/ldst_helper.c
@@ -195,7 +195,7 @@ static void demap_tlb(SparcTLBEntry *tlb, target_ulong
demap_addr,
replace_tlb_entry(&tlb[i], 0, 0, env1);
#ifdef DEBUG_MMU
DPRINTF_MMU("%s demap invalidated entry [%02u]\n", strmmu, i);
- dump_mmu(env1);
+ sparc_dump_mmu(env1);
#endif
}
}
@@ -257,7 +257,7 @@ static void replace_tlb_1bit_lru(SparcTLBEntry *tlb,
replace_tlb_entry(&tlb[i], tlb_tag, tlb_tte, env1);
#ifdef DEBUG_MMU
DPRINTF_MMU("%s lru replaced invalid entry [%i]\n", strmmu, i);
- dump_mmu(env1);
+ sparc_dump_mmu(env1);
#endif
return;
}
@@ -276,7 +276,7 @@ static void replace_tlb_1bit_lru(SparcTLBEntry *tlb,
#ifdef DEBUG_MMU
DPRINTF_MMU("%s lru replaced unlocked %s entry [%i]\n",
strmmu, (replace_used ? "used" : "unused"), i);
- dump_mmu(env1);
+ sparc_dump_mmu(env1);
#endif
return;
}
@@ -995,7 +995,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr,
uint64_t val,
break;
}
#ifdef DEBUG_MMU
- dump_mmu(env);
+ sparc_dump_mmu(env);
#endif
}
break;
@@ -1050,7 +1050,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr,
uint64_t val,
reg, oldreg, env->mmuregs[reg]);
}
#ifdef DEBUG_MMU
- dump_mmu(env);
+ sparc_dump_mmu(env);
#endif
}
break;
@@ -1736,7 +1736,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr,
target_ulong val,
PRIx64 "\n", reg, oldreg, env->immu.mmuregs[reg]);
}
#ifdef DEBUG_MMU
- dump_mmu(env);
+ sparc_dump_mmu(env);
#endif
return;
}
@@ -1760,7 +1760,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr,
target_ulong val,
}
#ifdef DEBUG_MMU
DPRINTF_MMU("immu data access replaced entry [%i]\n", i);
- dump_mmu(env);
+ sparc_dump_mmu(env);
#endif
return;
}
@@ -1820,7 +1820,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr,
target_ulong val,
PRIx64 "\n", reg, oldreg, env->dmmu.mmuregs[reg]);
}
#ifdef DEBUG_MMU
- dump_mmu(env);
+ sparc_dump_mmu(env);
#endif
return;
}
@@ -1842,7 +1842,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr,
target_ulong val,
}
#ifdef DEBUG_MMU
DPRINTF_MMU("dmmu data access replaced entry [%i]\n", i);
- dump_mmu(env);
+ sparc_dump_mmu(env);
#endif
return;
}
diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
index ad1591d9fd..f325c9a4cc 100644
--- a/target/sparc/mmu_helper.c
+++ b/target/sparc/mmu_helper.c
@@ -21,7 +21,7 @@
#include "qemu/log.h"
#include "cpu.h"
#include "exec/exec-all.h"
-#include "qemu/qemu-print.h"
+#include "monitor/monitor.h"
#include "trace.h"
/* Sparc MMU emulation */
@@ -344,7 +344,7 @@ target_ulong mmu_probe(CPUSPARCState *env, target_ulong
address, int mmulev)
return 0;
}
-void dump_mmu(CPUSPARCState *env)
+void sparc_dump_mmu(Monitor *mon, CPUSPARCState *env)
{
CPUState *cs = env_cpu(env);
target_ulong va, va1, va2;
@@ -352,29 +352,29 @@ void dump_mmu(CPUSPARCState *env)
hwaddr pa;
uint32_t pde;
- qemu_printf("Root ptr: " HWADDR_FMT_plx ", ctx: %d\n",
- (hwaddr)env->mmuregs[1] << 4, env->mmuregs[2]);
+ monitor_printf(mon, "Root ptr: " HWADDR_FMT_plx ", ctx: %d\n",
+ (hwaddr)env->mmuregs[1] << 4, env->mmuregs[2]);
for (n = 0, va = 0; n < 256; n++, va += 16 * 1024 * 1024) {
pde = mmu_probe(env, va, 2);
if (pde) {
pa = cpu_get_phys_page_debug(cs, va);
- qemu_printf("VA: " TARGET_FMT_lx ", PA: " HWADDR_FMT_plx
- " PDE: " TARGET_FMT_lx "\n", va, pa, pde);
+ monitor_printf(mon, "VA: " TARGET_FMT_lx ", PA: " HWADDR_FMT_plx
+ " PDE: " TARGET_FMT_lx "\n", va, pa, pde);
for (m = 0, va1 = va; m < 64; m++, va1 += 256 * 1024) {
pde = mmu_probe(env, va1, 1);
if (pde) {
pa = cpu_get_phys_page_debug(cs, va1);
- qemu_printf(" VA: " TARGET_FMT_lx ", PA: "
- HWADDR_FMT_plx " PDE: " TARGET_FMT_lx "\n",
- va1, pa, pde);
+ monitor_printf(mon, " VA: " TARGET_FMT_lx ", PA: "
+ HWADDR_FMT_plx " PDE: " TARGET_FMT_lx "\n",
+ va1, pa, pde);
for (o = 0, va2 = va1; o < 64; o++, va2 += 4 * 1024) {
pde = mmu_probe(env, va2, 0);
if (pde) {
pa = cpu_get_phys_page_debug(cs, va2);
- qemu_printf(" VA: " TARGET_FMT_lx ", PA: "
- HWADDR_FMT_plx " PTE: "
- TARGET_FMT_lx "\n",
- va2, pa, pde);
+ monitor_printf(mon, " VA: " TARGET_FMT_lx ", PA: "
+ HWADDR_FMT_plx " PTE: "
+ TARGET_FMT_lx "\n",
+ va2, pa, pde);
}
}
}
@@ -777,21 +777,21 @@ bool sparc_cpu_tlb_fill(CPUState *cs, vaddr address, int
size,
cpu_loop_exit_restore(cs, retaddr);
}
-void dump_mmu(CPUSPARCState *env)
+void sparc_dump_mmu(Monitor *mon, CPUSPARCState *env)
{
unsigned int i;
const char *mask;
- qemu_printf("MMU contexts: Primary: %" PRId64 ", Secondary: %"
- PRId64 "\n",
- env->dmmu.mmu_primary_context,
- env->dmmu.mmu_secondary_context);
- qemu_printf("DMMU Tag Access: %" PRIx64 ", TSB Tag Target: %" PRIx64
- "\n", env->dmmu.tag_access, env->dmmu.tsb_tag_target);
+ monitor_printf(mon, "MMU contexts: Primary: %" PRId64 ", Secondary: %"
+ PRId64 "\n",
+ env->dmmu.mmu_primary_context,
+ env->dmmu.mmu_secondary_context);
+ monitor_printf(mon, "DMMU Tag Access: %" PRIx64 ", TSB Tag Target: %"
PRIx64
+ "\n", env->dmmu.tag_access, env->dmmu.tsb_tag_target);
if ((env->lsu & DMMU_E) == 0) {
- qemu_printf("DMMU disabled\n");
+ monitor_printf(mon, "DMMU disabled\n");
} else {
- qemu_printf("DMMU dump\n");
+ monitor_printf(mon, "DMMU dump\n");
for (i = 0; i < 64; i++) {
switch (TTE_PGSIZE(env->dtlb[i].tte)) {
default:
@@ -809,28 +809,28 @@ void dump_mmu(CPUSPARCState *env)
break;
}
if (TTE_IS_VALID(env->dtlb[i].tte)) {
- qemu_printf("[%02u] VA: %" PRIx64 ", PA: %llx"
- ", %s, %s, %s, %s, ie %s, ctx %" PRId64 " %s\n",
- i,
- env->dtlb[i].tag & (uint64_t)~0x1fffULL,
- TTE_PA(env->dtlb[i].tte),
- mask,
- TTE_IS_PRIV(env->dtlb[i].tte) ? "priv" : "user",
- TTE_IS_W_OK(env->dtlb[i].tte) ? "RW" : "RO",
- TTE_IS_LOCKED(env->dtlb[i].tte) ?
- "locked" : "unlocked",
- TTE_IS_IE(env->dtlb[i].tte) ?
- "yes" : "no",
- env->dtlb[i].tag & (uint64_t)0x1fffULL,
- TTE_IS_GLOBAL(env->dtlb[i].tte) ?
- "global" : "local");
+ monitor_printf(mon, "[%02u] VA: %" PRIx64 ", PA: %llx"
+ ", %s, %s, %s, %s, ie %s, ctx %" PRId64 " %s\n",
+ i,
+ env->dtlb[i].tag & (uint64_t)~0x1fffULL,
+ TTE_PA(env->dtlb[i].tte),
+ mask,
+ TTE_IS_PRIV(env->dtlb[i].tte) ? "priv" : "user",
+ TTE_IS_W_OK(env->dtlb[i].tte) ? "RW" : "RO",
+ TTE_IS_LOCKED(env->dtlb[i].tte) ?
+ "locked" : "unlocked",
+ TTE_IS_IE(env->dtlb[i].tte) ?
+ "yes" : "no",
+ env->dtlb[i].tag & (uint64_t)0x1fffULL,
+ TTE_IS_GLOBAL(env->dtlb[i].tte) ?
+ "global" : "local");
}
}
}
if ((env->lsu & IMMU_E) == 0) {
- qemu_printf("IMMU disabled\n");
+ monitor_printf(mon, "IMMU disabled\n");
} else {
- qemu_printf("IMMU dump\n");
+ monitor_printf(mon, "IMMU dump\n");
for (i = 0; i < 64; i++) {
switch (TTE_PGSIZE(env->itlb[i].tte)) {
default:
@@ -848,18 +848,18 @@ void dump_mmu(CPUSPARCState *env)
break;
}
if (TTE_IS_VALID(env->itlb[i].tte)) {
- qemu_printf("[%02u] VA: %" PRIx64 ", PA: %llx"
- ", %s, %s, %s, ctx %" PRId64 " %s\n",
- i,
- env->itlb[i].tag & (uint64_t)~0x1fffULL,
- TTE_PA(env->itlb[i].tte),
- mask,
- TTE_IS_PRIV(env->itlb[i].tte) ? "priv" : "user",
- TTE_IS_LOCKED(env->itlb[i].tte) ?
- "locked" : "unlocked",
- env->itlb[i].tag & (uint64_t)0x1fffULL,
- TTE_IS_GLOBAL(env->itlb[i].tte) ?
- "global" : "local");
+ monitor_printf(mon, "[%02u] VA: %" PRIx64 ", PA: %llx"
+ ", %s, %s, %s, ctx %" PRId64 " %s\n",
+ i,
+ env->itlb[i].tag & (uint64_t)~0x1fffULL,
+ TTE_PA(env->itlb[i].tte),
+ mask,
+ TTE_IS_PRIV(env->itlb[i].tte) ? "priv" : "user",
+ TTE_IS_LOCKED(env->itlb[i].tte) ?
+ "locked" : "unlocked",
+ env->itlb[i].tag & (uint64_t)0x1fffULL,
+ TTE_IS_GLOBAL(env->itlb[i].tte) ?
+ "global" : "local");
}
}
}
diff --git a/target/sparc/monitor.c b/target/sparc/monitor.c
index 73f15aa272..4fcdf75932 100644
--- a/target/sparc/monitor.c
+++ b/target/sparc/monitor.c
@@ -36,7 +36,7 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict)
monitor_printf(mon, "No CPU available\n");
return;
}
- dump_mmu(env1);
+ sparc_dump_mmu(mon, env1);
}
#ifndef TARGET_SPARC64
--
2.41.0
