On Wed, Mar 13, 2024 at 3:24 PM Andrew Jones <ajo...@ventanamicro.com>
wrote:
> On Wed, Mar 13, 2024 at 11:39:30AM +0530, Himanshu Chauhan wrote:
> > This patch adds "sdtrig" in the ISA string when sdtrig extension is
> enabled.
> > The sdtrig extension may or may not be implemented in a system.
> Therefore, the
> > -cpu rv64,sdtrig=<true/false>
> > option can be used to dynamically turn sdtrig extension on or off.
> >
> > Since, the sdtrig ISA extension is a superset of debug specification,
> disable
> > the debug property when sdtrig is enabled. A warning is printed when
> this is
> > done.
> >
> > By default, the sdtrig extension is disabled and debug property enabled
> as usual.
> >
> > Signed-off-by: Himanshu Chauhan <hchau...@ventanamicro.com>
> > ---
> > target/riscv/cpu.c | 8 ++++++++
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> > index 2602aae9f5..ab057a0926 100644
> > --- a/target/riscv/cpu.c
> > +++ b/target/riscv/cpu.c
> > @@ -175,6 +175,7 @@ const RISCVIsaExtData isa_edata_arr[] = {
> > ISA_EXT_DATA_ENTRY(zvkt, PRIV_VERSION_1_12_0, ext_zvkt),
> > ISA_EXT_DATA_ENTRY(zhinx, PRIV_VERSION_1_12_0, ext_zhinx),
> > ISA_EXT_DATA_ENTRY(zhinxmin, PRIV_VERSION_1_12_0, ext_zhinxmin),
> > + ISA_EXT_DATA_ENTRY(sdtrig, PRIV_VERSION_1_12_0, ext_sdtrig),
> > ISA_EXT_DATA_ENTRY(smaia, PRIV_VERSION_1_12_0, ext_smaia),
> > ISA_EXT_DATA_ENTRY(smepmp, PRIV_VERSION_1_12_0, ext_smepmp),
> > ISA_EXT_DATA_ENTRY(smstateen, PRIV_VERSION_1_12_0, ext_smstateen),
> > @@ -1008,6 +1009,12 @@ static void riscv_cpu_reset_hold(Object *obj)
> > set_default_nan_mode(1, &env->fp_status);
> >
> > #ifndef CONFIG_USER_ONLY
> > + if (cpu->cfg.debug && cpu->cfg.ext_sdtrig) {
> > + warn_report("Disabling debug property since sdtrig ISA
> extension "
> > + "is enabled");
> > + cpu->cfg.debug = 0;
>
> If sdtrig is a superset of debug, then why do we need to disable debug?
>
"debug" is not disabled. The flag is turned off. This is for unambiguity
between which spec is in force currently.
May come handy (not now but later) in if conditions.
>
> Thanks,
> drew
>
> > + }
> > +
> > if (cpu->cfg.debug || cpu->cfg.ext_sdtrig) {
> > riscv_trigger_reset_hold(env);
> > }
> > @@ -1480,6 +1487,7 @@ const RISCVCPUMultiExtConfig
> riscv_cpu_extensions[] = {
> > MULTI_EXT_CFG_BOOL("zvfhmin", ext_zvfhmin, false),
> > MULTI_EXT_CFG_BOOL("sstc", ext_sstc, true),
> >
> > + MULTI_EXT_CFG_BOOL("sdtrig", ext_sdtrig, false),
> > MULTI_EXT_CFG_BOOL("smaia", ext_smaia, false),
> > MULTI_EXT_CFG_BOOL("smepmp", ext_smepmp, false),
> > MULTI_EXT_CFG_BOOL("smstateen", ext_smstateen, false),
> > --
> > 2.34.1
> >
> >
>
