On Mon, Mar 11, 2024 at 02:28:17PM +0800, Xiaoyao Li wrote: > Date: Mon, 11 Mar 2024 14:28:17 +0800 > From: Xiaoyao Li <xiaoyao...@intel.com> > Subject: Re: [PATCH v9 09/21] i386/cpu: Introduce bitmap to cache available > CPU topology levels > > On 2/27/2024 6:32 PM, Zhao Liu wrote: > > From: Zhao Liu <zhao1....@intel.com> > > > > Currently, QEMU checks the specify number of topology domains to detect > > if there's extended topology levels (e.g., checking nr_dies). > > > > With this bitmap, the extended CPU topology (the levels other than SMT, > > core and package) could be easier to detect without touching the > > topology details. > > > > This is also in preparation for the follow-up to decouple CPUID[0x1F] > > subleaf with specific topology level. > > > > Tested-by: Yongwei Ma <yongwei...@intel.com> > > Signed-off-by: Zhao Liu <zhao1....@intel.com> > > > Reviewed-by: Xiaoyao Li <xiaoyao...@intel.com>
Thanks for your review! Regrads, Zhao
