Gustavo Romero <gustavo.rom...@linaro.org> writes: [...]
> This patchset introduces a new device, ivshmem-flat, which is similar to the > current ivshmem device but does not require a PCI bus. It implements the > ivshmem > status and control registers as MMRs and the shared memory as a directly > accessible memory region in the VM memory layout. It's meant to be used on > machines like those with Cortex-M MCUs, which usually lack a PCI bus, e.g., > lm3s6965evb and mps2-an385. Additionally, it has the benefit of requiring a > tiny > 'device driver,' which is helpful on some RTOSes, like Zephyr, that run on > memory-constrained resource targets. > > The patchset includes a QTest for the ivshmem-flat device, however, it's also > possible to experiment with it in two ways: > > (a) using two Cortex-M VMs running Zephyr; or > (b) using one aarch64 VM running Linux with the ivshmem PCI device and another > arm (Cortex-M) VM running Zephyr with the new ivshmem-flat device. > > Please note that for running the ivshmem-flat QTests the following patch, > which > is not committed to the tree yet, must be applied: > > https://lists.nongnu.org/archive/html/qemu-devel/2023-11/msg03176.html What problem are you trying to solve with ivshmem? Shared memory is not a solution to any communication problem, it's merely a building block for building such solutions: you invariably have to layer some protocol on top. What do you intend to put on top of ivshmem? [...]
