On Fri, 23 Feb 2024 16:56:51 +0800
Zhao Liu <zhao1....@linux.intel.com> wrote:
> From: Zhao Liu <zhao1....@intel.com>
>
> As the comment in qapi/error, dereferencing @errp requires
> ERRP_GUARD():
>
> * = Why, when and how to use ERRP_GUARD() =
> *
> * Without ERRP_GUARD(), use of the @errp parameter is restricted:
> * - It must not be dereferenced, because it may be null.
> ...
> * ERRP_GUARD() lifts these restrictions.
> *
> * To use ERRP_GUARD(), add it right at the beginning of the function.
> * @errp can then be used without worrying about the argument being
> * NULL or &error_fatal.
> *
> * Using it when it's not needed is safe, but please avoid cluttering
> * the source with useless code.
>
> But in cxl_usp_realize(), @errp is dereferenced without ERRP_GUARD():
>
> cxl_doe_cdat_init(cxl_cstate, errp);
> if (*errp) {
> goto err_cap;
> }
>
> Here we check *errp, because cxl_doe_cdat_init() returns void. And since
> cxl_usp_realize() - as a PCIDeviceClass.realize() method - doesn't get
> the NULL @errp parameter, it hasn't triggered the bug that dereferencing
> the NULL @errp.
>
> To follow the requirement of @errp, add missing ERRP_GUARD() in
> cxl_usp_realize().
>
> Suggested-by: Markus Armbruster <arm...@redhat.com>
> Signed-off-by: Zhao Liu <zhao1....@intel.com>
> Reviewed-by: Markus Armbruster <arm...@redhat.com>
Acked-by: Jonathan Cameron <jonathan.came...@huawei.com>
> ---
> Suggested by credit:
> Markus: Referred his explanation about ERRP_GUARD().
> ---
> v2:
> * Add the @errp dereference code in commit message to make review
> easier. (Markus)
> ---
> hw/pci-bridge/cxl_upstream.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/hw/pci-bridge/cxl_upstream.c b/hw/pci-bridge/cxl_upstream.c
> index e87eb4017713..03d123cca0ef 100644
> --- a/hw/pci-bridge/cxl_upstream.c
> +++ b/hw/pci-bridge/cxl_upstream.c
> @@ -289,6 +289,7 @@ static void free_default_cdat_table(CDATSubHeader
> **cdat_table, int num,
>
> static void cxl_usp_realize(PCIDevice *d, Error **errp)
> {
> + ERRP_GUARD();
> PCIEPort *p = PCIE_PORT(d);
> CXLUpstreamPort *usp = CXL_USP(d);
> CXLComponentState *cxl_cstate = &usp->cxl_cstate;
