On Fri, Feb 16, 2024 at 8:41 AM Daniel Henrique Barboza <dbarb...@ventanamicro.com> wrote: > > Hi, > > This new version is rebased with alistair/riscv-to-apply.next and with > more acks added. > > No other changes made. > > Changes from v3: > - rebased with alistair/riscv-to-apply.next @ c93c42a273 > - v3 link: > https://lore.kernel.org/qemu-riscv/20240202152154.773253-1-dbarb...@ventanamicro.com/ > > Andrew Jones (3): > target/riscv: Reset henvcfg to zero > target/riscv: Gate hardware A/D PTE bit updating > target/riscv: Promote svade to a normal extension > > Daniel Henrique Barboza (3): > target/riscv/tcg: set 'mmu' with 'satp' in cpu_set_profile() > target/riscv: add riscv,isa to named features > target/riscv: add remaining named features
Thanks! Applied to riscv-to-apply.next Alistair > > target/riscv/cpu.c | 70 +++++++++++++++++++++++++++----------- > target/riscv/cpu_cfg.h | 12 +++++-- > target/riscv/cpu_helper.c | 19 ++++++++--- > target/riscv/csr.c | 2 +- > target/riscv/tcg/tcg-cpu.c | 34 +++++++++--------- > 5 files changed, 94 insertions(+), 43 deletions(-) > > -- > 2.43.0 > >
