On Wed, Feb 7, 2024 at 6:18 PM Jason Chien <jason.ch...@sifive.com> wrote:
>
> The original implementation sets $pc to the address read from the jump
> vector table first and links $ra with the address of the next instruction
> after the updated $pc. After jumping to the updated $pc and executing the
> next ret instruction, the program jumps to $ra, which is in the same
> function currently executing, which results in an infinite loop.
> This commit stores the jump address in a temporary, updates $ra with the
> current $pc, and copies the temporary to $pc.
>
> Signed-off-by: Jason Chien <jason.ch...@sifive.com>
> Reviewed-by: Frank Chang <frank.ch...@sifive.com>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> target/riscv/insn_trans/trans_rvzce.c.inc | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/target/riscv/insn_trans/trans_rvzce.c.inc
> b/target/riscv/insn_trans/trans_rvzce.c.inc
> index 2d992e14c4..cd234ad960 100644
> --- a/target/riscv/insn_trans/trans_rvzce.c.inc
> +++ b/target/riscv/insn_trans/trans_rvzce.c.inc
> @@ -293,12 +293,14 @@ static bool trans_cm_jalt(DisasContext *ctx,
> arg_cm_jalt *a)
> {
> REQUIRE_ZCMT(ctx);
>
> + TCGv addr = tcg_temp_new();
> +
> /*
> * Update pc to current for the non-unwinding exception
> * that might come from cpu_ld*_code() in the helper.
> */
> gen_update_pc(ctx, 0);
> - gen_helper_cm_jalt(cpu_pc, tcg_env, tcg_constant_i32(a->index));
> + gen_helper_cm_jalt(addr, tcg_env, tcg_constant_i32(a->index));
>
> /* c.jt vs c.jalt depends on the index. */
> if (a->index >= 32) {
> @@ -307,6 +309,8 @@ static bool trans_cm_jalt(DisasContext *ctx, arg_cm_jalt
> *a)
> gen_set_gpr(ctx, xRA, succ_pc);
> }
>
> + tcg_gen_mov_tl(cpu_pc, addr);
> +
> tcg_gen_lookup_and_goto_ptr();
> ctx->base.is_jmp = DISAS_NORETURN;
> return true;
> --
> 2.43.0
>
>
