On Wed, Feb 7, 2024 at 8:12 PM Philippe Mathieu-Daudé <phi...@linaro.org> wrote: > > Hi Paolo, > > On 7/2/24 12:14, Paolo Bonzini wrote: > > itc_reconfigure() is referenced from TCG, provide a stub if needed. > > This makes it possible to build a QEMU binary that only includes > > boards without a CPS device (only Malta and Boston create one). > > > > Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> > > --- > > hw/mips/mips_itu-stub.c | 26 ++++++++++++++++++++++++++ > > hw/mips/meson.build | 1 + > > 2 files changed, 27 insertions(+) > > create mode 100644 hw/mips/mips_itu-stub.c > > > > diff --git a/hw/mips/mips_itu-stub.c b/hw/mips/mips_itu-stub.c > > new file mode 100644 > > index 00000000000..4cc82b8461f > > --- /dev/null > > +++ b/hw/mips/mips_itu-stub.c > > @@ -0,0 +1,26 @@ > > +/* > > + * Inter-Thread Communication Unit emulation. > > + * > > + * Copyright (c) 2016 Imagination Technologies > > + * > > + * This library is free software; you can redistribute it and/or > > + * modify it under the terms of the GNU Lesser General Public > > + * License as published by the Free Software Foundation; either > > + * version 2.1 of the License, or (at your option) any later version. > > + * > > + * This library is distributed in the hope that it will be useful, > > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU > > + * Lesser General Public License for more details. > > + * > > + * You should have received a copy of the GNU Lesser General Public > > + * License along with this library; if not, see > > <http://www.gnu.org/licenses/>. > > This is your code addition, so "Inter-Thread Communication Unit stubs" / > RH / SPDX GPLv2-or-later. > > > + */ > > + > > +#include "qemu/osdep.h" > > +#include "hw/misc/mips_itu.h" > > + > > +void itc_reconfigure(MIPSITUState *tag) > > +{ > > + abort(); > > As Zoltan suggested, g_assert_not_reached(). Indeed this path > can't be reached without ITU, TCG won't emit anything and will > call instead: > > qemu_log_mask(LOG_UNIMP, "mthc0 %s (reg %d sel %d)\n", > register_name, reg, sel); > > I'm reluctant to add stubs, but since it helps you (hoping we > can figure a clean way to split architectural access to hw/ from > tcg/ one day):
Not sure how it's reached anyway, because the saar field of DisasContext is never written... Paolo