On Sun, Jan 28, 2024 at 6:29 PM Akihiko Odaki <akihiko.od...@daynix.com> wrote: > > This series extracts fixes and refactorings that can be applied > independently from "[PATCH v9 00/23] plugins: Allow to read registers". > > The patch "target/riscv: Move MISA limits to class" was replaced with > patch "target/riscv: Move misa_mxl_max to class" since I found instances > may have different misa_ext_mask.
Do you mind rebasing this on https://github.com/alistair23/qemu/tree/riscv-to-apply.next ? Alistair > > V6 -> V7: > Rebased. > > V5 -> V6: > Added patch "default-configs: Add TARGET_XML_FILES definition". > Rebased. > > V4 -> V5: > Added patch "hw/riscv: Use misa_mxl instead of misa_mxl_max". > > V3 -> V4: > Added patch "gdbstub: Check if gdb_regs is NULL". > > V2 -> V3: > Restored patch sets from the previous version. > Rebased to commit 800485762e6564e04e2ab315132d477069562d91. > > V1 -> V2: > Added patch "target/riscv: Do not allow MXL_RV32 for TARGET_RISCV64". > Added patch "target/riscv: Initialize gdb_core_xml_file only once". > Dropped patch "target/riscv: Remove misa_mxl validation". > Dropped patch "target/riscv: Move misa_mxl_max to class". > Dropped patch "target/riscv: Validate misa_mxl_max only once". > > Signed-off-by: Akihiko Odaki <akihiko.od...@daynix.com> > --- > Changes in v10: > - Dropped patch "hw/riscv: Use misa_mxl instead of misa_mxl_max" due to > invalid assumption that the relevant code is only used for kernel > loading. > - Link to v9: > https://lore.kernel.org/r/20240115-riscv-v9-0-ff171e1ae...@daynix.com > > Changes in v9: > - Rebased to commit 977542ded7e6b28d2bc077bcda24568c716e393c. > - Link to v8: > https://lore.kernel.org/r/20231218-riscv-v8-0-c9bf2b158...@daynix.com > > Changes in v8: > - Added a more detailed explanation for patch "hw/riscv: Use misa_mxl > instead of misa_mxl_max". (Alistair Francis) > - Link to v7: > https://lore.kernel.org/r/20231213-riscv-v7-0-a760156a3...@daynix.com > > --- > Akihiko Odaki (3): > target/riscv: Remove misa_mxl validation > target/riscv: Move misa_mxl_max to class > target/riscv: Validate misa_mxl_max only once > > target/riscv/cpu.h | 4 +- > hw/riscv/boot.c | 3 +- > target/riscv/cpu.c | 183 > ++++++++++++++++++++++++++------------------- > target/riscv/gdbstub.c | 12 ++- > target/riscv/kvm/kvm-cpu.c | 10 +-- > target/riscv/machine.c | 7 +- > target/riscv/tcg/tcg-cpu.c | 44 ++--------- > target/riscv/translate.c | 3 +- > 8 files changed, 135 insertions(+), 131 deletions(-) > --- > base-commit: 977542ded7e6b28d2bc077bcda24568c716e393c > change-id: 20231213-riscv-fcc9640986cf > > Best regards, > -- > Akihiko Odaki <akihiko.od...@daynix.com> > >
