From: Richard Henderson <richard.hender...@linaro.org>
A typo in sizeof_reg put the registers at the wrong offset.
Simplify the expressions to use positive addresses from the
start of uc_mcontext instead of negative addresses from the
end of uc_mcontext.
Reported-by: Vineet Gupta <vine...@rivosinc.com>
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
(cherry picked from commit 1b21fe27e75a59bfe2513f5abcc6a18cfc35cfc8)
Signed-off-by: Michael Tokarev <m...@tls.msk.ru>
diff --git a/linux-user/riscv/vdso-32.so b/linux-user/riscv/vdso-32.so
index 1ad1e5cbbb..c2ce2a4757 100755
Binary files a/linux-user/riscv/vdso-32.so and b/linux-user/riscv/vdso-32.so
differ
diff --git a/linux-user/riscv/vdso-64.so b/linux-user/riscv/vdso-64.so
index 83992bebe6..ae49f5b043 100755
Binary files a/linux-user/riscv/vdso-64.so and b/linux-user/riscv/vdso-64.so
differ
diff --git a/linux-user/riscv/vdso.S b/linux-user/riscv/vdso.S
index a86d8fc488..c37275233a 100644
--- a/linux-user/riscv/vdso.S
+++ b/linux-user/riscv/vdso.S
@@ -101,12 +101,12 @@ endf __vdso_flush_icache
.cfi_startproc simple
.cfi_signal_frame
-#define sizeof_reg (__riscv_xlen / 4)
+#define sizeof_reg (__riscv_xlen / 8)
#define sizeof_freg 8
-#define B_GR (offsetof_uc_mcontext - sizeof_rt_sigframe)
-#define B_FR (offsetof_uc_mcontext - sizeof_rt_sigframe + offsetof_freg0)
+#define B_GR 0
+#define B_FR offsetof_freg0
- .cfi_def_cfa 2, sizeof_rt_sigframe
+ .cfi_def_cfa 2, offsetof_uc_mcontext
/* Return address */
.cfi_return_column 64
--
2.39.2
