On Thu, 16 Nov 2023 16:09:03 -0800 Ira Weiny <ira.we...@intel.com> wrote:
> nifan.cxl@ wrote: > > From: Fan Ni <nifan....@gmail.com> > > > > > > The patch series are based on Jonathan's branch cxl-2023-09-26. > > Finally getting around to trying this new series and the patch series does not > seem to apply on top of this branch? > > Just to verify is this the top commit this work was based on? > > d4edf131bbac [jonathan/cxl-2023-09-26] cxl/vendor: SK hynix Niagara > Multi-Headed SLD Device > > I seem to have found some issue with CDAT checksumming[1] which I'm not quite > sure about. > > I went ahead and pulled your latest work from: > > https://github.com/moking/qemu-jic-clone.git dcd-dev > > abe893944bb3 hw/mem/cxl_type3: Add dpa range validation for accesses to > dc regions > > It still has this same problem. > > Before I dig into this, is this the latest dcd branch? I've pushed out a new tree, but it's definitely in a may eat babies form... gitlab.com/jic23/qemu cxl-2024-26-01-draft Only had the most basic of testing so far. DCD rebase was messy as I've dragged it into the 'next to send upstream' location and various fixes including Ira's CDAT one have gone out already. I'm keen to try and land this in QEMU 9.0 which basically means we have until the end of Feb to shake out any problems. Some other work is at least somewhat built on top of this (because of the need to deal with DCD regions as well as pmem and volatile ones). Jonathan > > Has anything changed in how you specify DCD devices on the qemu command line > with this latest work? Here is what I have: > > ... > -device > cxl-type3,bus=hb0rp0,memdev=cxl-mem0,num-dc-regions=2,nonvolatile-dc-memdev=cxl-dc-mem0,id=cxl-dev0,lsa=cxl-lsa0,sn=0 > -device > cxl-type3,bus=hb0rp1,memdev=cxl-mem1,num-dc-regions=2,nonvolatile-dc-memdev=cxl-dc-mem1,id=cxl-dev1,lsa=cxl-lsa1,sn=1 > -device > cxl-type3,bus=hb1rp0,memdev=cxl-mem2,num-dc-regions=2,nonvolatile-dc-memdev=cxl-dc-mem2,id=cxl-dev2,lsa=cxl-lsa2,sn=2 > -device > cxl-type3,bus=hb1rp1,memdev=cxl-mem3,num-dc-regions=2,nonvolatile-dc-memdev=cxl-dc-mem3,id=cxl-dev3,lsa=cxl-lsa3,sn=3 > ... > > > Ira > > [1] > https://lore.kernel.org/all/20231116-fix-cdat-devm-free-v1-1-b148b4070...@intel.com/ > > > > The main changes include, > > 1. Update cxl_find_dc_region to detect the case the range of the extent > > cross > > multiple DC regions. > > 2. Add comments to explain the checks performed in function > > cxl_detect_malformed_extent_list. (Jonathan) > > 3. Minimize the checks in cmd_dcd_add_dyn_cap_rsp.(Jonathan) > > 4. Update total_extent_count in add/release dynamic capacity response > > function. > > (Ira and Jorgen Hansen). > > 5. Fix the logic issue in test_bits and renamed it to > > test_any_bits_set to clear its function. > > 6. Add pending extent list for dc extent add event. > > 7. When add extent response is received, use the pending-to-add list to > > verify the extents are valid. > > 8. Add test_any_bits_set and cxl_insert_extent_to_extent_list declaration to > > cxl_device.h so it can be used in different files. > > 9. Updated ct3d_qmp_cxl_event_log_enc to include dynamic capacity event > > log type. > > 10. Extract the functionality to delete extent from extent list to a helper > > function. > > 11. Move the update of the bitmap which reflects which blocks are backed > > with > > dc extents from the moment when a dc extent is offered to the moment when it > > is accepted from the host. > > 12. Free dc_name after calling address_space_init to avoid memory leak when > > returning early. (Nathan) > > 13. Add code to detect and reject QMP requests without any extents. > > (Jonathan) > > 14. Add code to detect and reject QMP requests where the extent len is 0. > > 15. Change the QMP interface and move the region-id out of extents and now > > each command only takes care of extent add/release request in a single > > region. (Jonathan) > > 16. Change the region bitmap length from decode_len to len. > > 17. Rename "dpa" to "offset" in the add/release dc extent qmp interface. > > (Jonathan) > > 18. Block any dc extent release command if the exact extent is not already > > in > > the extent list of the device. > > > > The code is tested together with Ira's kernel DCD support: > > https://github.com/weiny2/linux-kernel/tree/dcd-v3-2023-10-30 > > > > Cover letter from v2 is here: > > https://lore.kernel.org/linux-cxl/20230724162313.34196-1-fan...@samsung.com/T/#m63039621087023691c9749a0af1212deb5549ddf > > > > Last version (v2) is here: > > https://lore.kernel.org/linux-cxl/20230725183939.2741025-1-fan...@samsung.com/ > > > > More DCD related discussions are here: > > https://lore.kernel.org/linux-cxl/650cc29ab3f64_50d07294e7@iweiny-mobl.notmuch/ > > > > > > > > Fan Ni (9): > > hw/cxl/cxl-mailbox-utils: Add dc_event_log_size field to output > > payload of identify memory device command > > hw/cxl/cxl-mailbox-utils: Add dynamic capacity region representative > > and mailbox command support > > include/hw/cxl/cxl_device: Rename mem_size as static_mem_size for > > type3 memory devices > > hw/mem/cxl_type3: Add support to create DC regions to type3 memory > > devices > > hw/mem/cxl_type3: Add host backend and address space handling for DC > > regions > > hw/mem/cxl_type3: Add DC extent list representative and get DC extent > > list mailbox support > > hw/cxl/cxl-mailbox-utils: Add mailbox commands to support add/release > > dynamic capacity response > > hw/cxl/events: Add qmp interfaces to add/release dynamic capacity > > extents > > hw/mem/cxl_type3: Add dpa range validation for accesses to dc regions > > > > hw/cxl/cxl-mailbox-utils.c | 469 +++++++++++++++++++++++++++++- > > hw/mem/cxl_type3.c | 548 +++++++++++++++++++++++++++++++++--- > > hw/mem/cxl_type3_stubs.c | 14 + > > include/hw/cxl/cxl_device.h | 64 ++++- > > include/hw/cxl/cxl_events.h | 15 + > > qapi/cxl.json | 60 +++- > > 6 files changed, 1123 insertions(+), 47 deletions(-) > > > > -- > > 2.42.0 > > > > >
