Hi, This is a bundle of fixes based on discoveries that were made in the last week or so:
- what we call "named features" are actually real extensions, which are considered to be ratified by the profile spec that defines them. This means that we need to add riscv,isa strings for them. More info can be found on the commit msg of patch 2; - the design behind 'svade' and 'svadu' is wrong. 'svade' does not mean 'we do not have svadu'. In fact they can coexist. Patch 5 gives more details about it. After this series, 'svade' is promoted to a regular extension and all the named features QEMU implements are now being displayed in riscv,isa. Andrew Jones (3): target/riscv: Reset henvcfg to zero target/riscv: Gate hardware A/D PTE bit updating target/riscv: Promote svade to a normal extension Daniel Henrique Barboza (3): target/riscv/tcg: set 'mmu' with 'satp' in cpu_set_profile() target/riscv: add riscv,isa to named features target/riscv: add remaining named features target/riscv/cpu.c | 63 ++++++++++++++++++++++++++++---------- target/riscv/cpu_cfg.h | 15 +++++++-- target/riscv/cpu_helper.c | 18 ++++++++--- target/riscv/csr.c | 2 +- target/riscv/tcg/tcg-cpu.c | 42 +++++++++++++++---------- 5 files changed, 99 insertions(+), 41 deletions(-) -- 2.43.0
