On a system influenced by ERRATA_772415, IOMMU_HW_INFO_VTD_ERRATA_772415_SPR17 is repored by IOMMU_DEVICE_GET_HW_INFO. Due to this errata, even the readonly range mapped on stage-2 page table could still be written.
Reference from 4th Gen Intel Xeon Processor Scalable Family Specification Update, Errata Details, SPR17. [0] https://edc.intel.com/content/www/us/en/design/products-and-solutions/processors-and-chipsets/eagle-stream/sapphire-rapids-specification-update We utilize the new added IOMMUFD container/ioas/hwpt management framework in VTD. Add a check to create new VTDIOASContainer to hold RW-only mappings, then this VTDIOASContainer can be used as backend for device with ERRATA_772415. See below diagram for details: IntelIOMMUState | V .------------------. .------------------. .-------------------. | VTDIOASContainer |--->| VTDIOASContainer |--->| VTDIOASContainer |-->... | (iommufd0,RW&RO) | | (iommufd1,RW&RO) | | (iommufd0,RW only)| .------------------. .------------------. .-------------------. | | | | .-->... | V V .-------------------. .-------------------. .---------------. | VTDS2Hwpt(CC) |--->| VTDS2Hwpt(non-CC) |-->... | VTDS2Hwpt(CC) |-->... .-------------------. .-------------------. .---------------. | | | | | | | | .-----------. .-----------. .------------. .------------. | IOMMUFD | | IOMMUFD | | IOMMUFD | | IOMMUFD | | Device(CC)| | Device(CC)| | Device | | Device(CC) | | (iommufd0)| | (iommufd0)| | (non-CC) | | (errata) | | | | | | (iommufd0) | | (iommufd0) | .-----------. .-----------. .------------. .------------. Suggested-by: Yi Liu <yi.l....@intel.com> Signed-off-by: Zhenzhong Duan <zhenzhong.d...@intel.com> --- include/hw/i386/intel_iommu.h | 2 ++ hw/i386/intel_iommu.c | 27 +++++++++++++++++++-------- 2 files changed, 21 insertions(+), 8 deletions(-) diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h index d3122cf699..72702e10a2 100644 --- a/include/hw/i386/intel_iommu.h +++ b/include/hw/i386/intel_iommu.h @@ -108,6 +108,7 @@ struct pasid_key { struct VTDIOASContainer { IOMMUFDBackend *iommufd; uint32_t ioas_id; + uint32_t errata; MemoryListener listener; QLIST_HEAD(, VTDS2Hwpt) s2_hwpt_list; QLIST_ENTRY(VTDIOASContainer) next; @@ -200,6 +201,7 @@ struct VTDIOMMUFDDevice { PCIBus *bus; uint8_t devfn; IOMMUFDDevice *idev; + uint32_t errata; IntelIOMMUState *iommu_state; QLIST_ENTRY(VTDIOMMUFDDevice) next; }; diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index df93fcacd8..8f9a59ae6f 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -2121,7 +2121,8 @@ static void vtd_context_global_invalidate(IntelIOMMUState *s) vtd_iommu_replay_all(s); } -static bool iommufd_listener_skipped_section(MemoryRegionSection *section) +static bool iommufd_listener_skipped_section(VTDIOASContainer *container, + MemoryRegionSection *section) { return !memory_region_is_ram(section->mr) || memory_region_is_protected(section->mr) || @@ -2131,7 +2132,8 @@ static bool iommufd_listener_skipped_section(MemoryRegionSection *section) * are never accessed by the CPU and beyond the address width of * some IOMMU hardware. TODO: VFIO should tell us the IOMMU width. */ - section->offset_within_address_space & (1ULL << 63); + section->offset_within_address_space & (1ULL << 63) || + (container->errata && section->readonly); } static void iommufd_listener_region_add_s2domain(MemoryListener *listener, @@ -2147,7 +2149,7 @@ static void iommufd_listener_region_add_s2domain(MemoryListener *listener, Error *err = NULL; int ret; - if (iommufd_listener_skipped_section(section)) { + if (iommufd_listener_skipped_section(container, section)) { return; } iova = REAL_HOST_PAGE_ALIGN(section->offset_within_address_space); @@ -2198,7 +2200,7 @@ static void iommufd_listener_region_del_s2domain(MemoryListener *listener, Int128 llend, llsize; int ret; - if (iommufd_listener_skipped_section(section)) { + if (iommufd_listener_skipped_section(container, section)) { return; } iova = REAL_HOST_PAGE_ALIGN(section->offset_within_address_space); @@ -2468,7 +2470,8 @@ static int vtd_device_attach_iommufd(VTDIOMMUFDDevice *vtd_idev, /* try to attach to an existing container in this space */ QLIST_FOREACH(container, &s->containers, next) { - if (container->iommufd != iommufd) { + if (container->iommufd != iommufd || + container->errata != vtd_idev->errata) { continue; } @@ -2495,6 +2498,7 @@ static int vtd_device_attach_iommufd(VTDIOMMUFDDevice *vtd_idev, container = g_malloc0(sizeof(*container)); container->iommufd = iommufd; container->ioas_id = ioas_id; + container->errata = vtd_idev->errata; QLIST_INIT(&container->s2_hwpt_list); if (vtd_device_attach_container(vtd_idev, container, @@ -5002,10 +5006,11 @@ static bool vtd_sync_hw_info(IntelIOMMUState *s, struct iommu_hw_info_vtd *vtd, * could bind guest page table to host. */ static bool vtd_check_idev(IntelIOMMUState *s, IOMMUFDDevice *idev, - Error **errp) + uint32_t *flags, Error **errp) { struct iommu_hw_info_vtd vtd; enum iommu_hw_info_type type = IOMMU_HW_INFO_TYPE_INTEL_VTD; + bool passed; if (iommufd_device_get_info(idev, &type, sizeof(vtd), &vtd)) { error_setg(errp, "Failed to get IOMMU capability!!!"); @@ -5017,7 +5022,11 @@ static bool vtd_check_idev(IntelIOMMUState *s, IOMMUFDDevice *idev, return false; } - return vtd_sync_hw_info(s, &vtd, errp); + passed = vtd_sync_hw_info(s, &vtd, errp); + if (passed) { + *flags = vtd.flags; + } + return passed; } static int vtd_dev_set_iommu_device(PCIBus *bus, void *opaque, int32_t devfn, @@ -5030,6 +5039,7 @@ static int vtd_dev_set_iommu_device(PCIBus *bus, void *opaque, int32_t devfn, .devfn = devfn, }; struct vtd_as_key *new_key; + uint32_t flags; assert(0 <= devfn && devfn < PCI_DEVFN_MAX); @@ -5042,7 +5052,7 @@ static int vtd_dev_set_iommu_device(PCIBus *bus, void *opaque, int32_t devfn, return -1; } - if (!vtd_check_idev(s, idev, errp)) { + if (!vtd_check_idev(s, idev, &flags, errp)) { return -1; } @@ -5064,6 +5074,7 @@ static int vtd_dev_set_iommu_device(PCIBus *bus, void *opaque, int32_t devfn, vtd_idev->devfn = (uint8_t)devfn; vtd_idev->iommu_state = s; vtd_idev->idev = idev; + vtd_idev->errata = flags & IOMMU_HW_INFO_VTD_ERRATA_772415_SPR17; QLIST_INSERT_HEAD(&s->vtd_idev_list, vtd_idev, next); g_hash_table_insert(s->vtd_iommufd_dev, new_key, vtd_idev); -- 2.34.1
