A few bug fixes for some Gitlab issues and a Coverity fix Alistair Francis (3): target/riscv: Assert that the CSR numbers will be correct target/riscv: Don't adjust vscause for exceptions target/riscv: Ensure mideleg is set correctly on reset
target/riscv/cpu.c | 8 ++++++++ target/riscv/cpu_helper.c | 4 ++-- target/riscv/csr.c | 5 ++++- 3 files changed, 14 insertions(+), 3 deletions(-) -- 2.43.0
