On Thu, Jan 4, 2024 at 3:46 AM Daniel Henrique Barboza
<dbarb...@ventanamicro.com> wrote:
>
> user_spec, bext_spec and bext_ver aren't being used.
>
> Signed-off-by: Daniel Henrique Barboza <dbarb...@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
Alistair
> ---
> target/riscv/cpu.h | 1 -
> target/riscv/cpu_cfg.h | 2 --
> 2 files changed, 3 deletions(-)
>
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index d74b361be6..40c96a32cc 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -164,7 +164,6 @@ struct CPUArchState {
> target_ulong guest_phys_fault_addr;
>
> target_ulong priv_ver;
> - target_ulong bext_ver;
> target_ulong vext_ver;
>
> /* RISCVMXL, but uint32_t for vmstate migration */
> diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h
> index f4605fb190..c67a8731d3 100644
> --- a/target/riscv/cpu_cfg.h
> +++ b/target/riscv/cpu_cfg.h
> @@ -136,8 +136,6 @@ struct RISCVCPUConfig {
>
> uint32_t pmu_mask;
> char *priv_spec;
> - char *user_spec;
> - char *bext_spec;
> char *vext_spec;
> uint16_t vlen;
> uint16_t elen;
> --
> 2.43.0
>
>
