On Wed, Jan 3, 2024 at 10:59 AM Alexey Baturo <baturo.ale...@gmail.com> wrote:
> +
> +bool riscv_cpu_bare_mode(CPURISCVState *env)
> +{
> + int satp_mode = 0;
> +#ifndef CONFIG_USER_ONLY
> + if (riscv_cpu_mxl(env) == MXL_RV32) {
> + satp_mode = get_field(env->satp, SATP32_MODE);
> + } else {
> + satp_mode = get_field(env->satp, SATP64_MODE);
> + }
> +#endif
> + return (satp_mode == VM_1_10_MBARE);
> +}
> +
Assume the CPU was in S or U with satp = non-bare mode but then a
transfer to M-mode happened.
In that case, even though the CPU is in M mode, the above function
will return non-bare mode and enforce
signed extension on M mode pointer masking (if enabled).
right or am I missing something here?
