On 21/12/23 22:32, Inès Varhol wrote:
This commit adds a new B-L475E-IOT01A board using the STM32L475VG SoC
as well as a dedicated documentation file.
The implementation is derived from the Netduino Plus 2 machine.
There are no peripherals implemented yet, only memory regions.
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
(please drop newline)
Signed-off-by: Arnaud Minier <arnaud.min...@telecom-paris.fr>
Signed-off-by: Inès Varhol <ines.var...@telecom-paris.fr>
---
MAINTAINERS | 7 +++
configs/devices/arm-softmmu/default.mak | 1 +
docs/system/arm/b-l475e-iot01a.rst | 46 ++++++++++++++++
docs/system/arm/stm32.rst | 6 ++-
docs/system/target-arm.rst | 1 +
hw/arm/Kconfig | 6 +++
hw/arm/b-l475e-iot01a.c | 70 +++++++++++++++++++++++++
hw/arm/meson.build | 1 +
8 files changed, 136 insertions(+), 2 deletions(-)
create mode 100644 docs/system/arm/b-l475e-iot01a.rst
create mode 100644 hw/arm/b-l475e-iot01a.c
diff --git a/hw/arm/b-l475e-iot01a.c b/hw/arm/b-l475e-iot01a.c
new file mode 100644
index 0000000000..c3790e3dc8
--- /dev/null
+++ b/hw/arm/b-l475e-iot01a.c
@@ -0,0 +1,70 @@
+/*
+ * B-L475E-IOT01A Discovery Kit machine
+ * (B-L475E-IOT01A IoT Node)
+ *
+ * Copyright (c) 2023 Arnaud Minier <arnaud.min...@telecom-paris.fr>
+ * Copyright (c) 2023 Inès Varhol <ines.var...@telecom-paris.fr>
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ *
+ * This work is heavily inspired by the netduinoplus2 by Alistair Francis.
+ * Original code is licensed under the MIT License:
+ *
+ * Copyright (c) 2014 Alistair Francis <alist...@alistair23.me>
+ */
+
+/*
+ * The reference used is the STMicroElectronics UM2153 User manual
+ * Discovery kit for IoT node, multi-channel communication with STM32L4.
+ * https://www.st.com/en/evaluation-tools/b-l475e-iot01a.html#documentation
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/boards.h"
+#include "hw/qdev-properties.h"
+#include "hw/qdev-clock.h"
+#include "qemu/error-report.h"
+#include "hw/arm/stm32l4x5_soc.h"
+#include "hw/arm/boot.h"
+
+/* Main SYSCLK frequency in Hz (80MHz) */
+#define SYSCLK_FRQ 80000000ULL
Alternative self-documenting name: MAIN_SYSCLK_FREQ_HZ
+static void b_l475e_iot01a_machine_init(MachineClass *mc)
+{
+ static const char *machine_valid_cpu_types[] = {
+ ARM_CPU_TYPE_NAME("cortex-m4"),
+ NULL};
Per our coding style, the trailing '}' goes on a newline.
+ mc->desc = "B-L475E-IOT01A Discovery Kit (Cortex-M4)";
+ mc->init = b_l475e_iot01a_init;
+ mc->valid_cpu_types = machine_valid_cpu_types;
+
+ /* SRAM pre-allocated as part of the SoC instantiation */
+ mc->default_ram_size = 0;
+}
Tested-by: Philippe Mathieu-Daudé <phi...@linaro.org>
