Hi,
ping for review?
On 12/12/23 17:29, Philippe Mathieu-Daudé wrote:
Hi,
When a MPCore cluster is used, the Cortex-A cores belong the the
cluster container, not to the board/soc layer. This series move
the creation of vCPUs to the MPCore private container.
Doing so we consolidate the QOM model, moving common code in a
central place (abstract MPCore parent).
This eventually allow removing one qemu_get_cpu() use, which we
want to remove in heterogeneous machines (machines using MPCore
are candidate for heterogeneous emulation).
Maybe these hw/cpu/arm/ files belong to hw/arm/...
Regards,
Phil.
Philippe Mathieu-Daudé (33):
hw/arm/boot: Propagate vCPU to arm_load_dtb()
hw/arm/fsl-imx6: Add a local 'gic' variable
hw/arm/fsl-imx6ul: Add a local 'gic' variable
hw/arm/fsl-imx7: Add a local 'gic' variable
hw/cpu: Remove dead Kconfig
hw/cpu/arm: Rename 'busdev' -> 'gicsbd' in a15mp_priv_realize()
hw/cpu/arm: Alias 'num-cpu' property on TYPE_REALVIEW_MPCORE
hw/cpu/arm: Declare CPU QOM types using DEFINE_TYPES() macro
hw/cpu/arm: Merge {a9mpcore.h, a15mpcore.h} as cortex_mpcore.h
hw/cpu/arm: Introduce abstract CORTEX_MPCORE_PRIV QOM type
hw/cpu/arm: Have A9MPCORE/A15MPCORE inheritate common
CORTEX_MPCORE_PRIV
hw/cpu/arm: Create MPCore container in QOM parent
hw/cpu/arm: Handle 'num_cores' property once in MPCore parent
hw/cpu/arm: Handle 'has_el2/3' properties once in MPCore parent
hw/cpu/arm: Handle 'gic-irq' property once in MPCore parent
hw/cpu/arm: Handle GIC once in MPCore parent
hw/cpu/arm: Document more properties of CORTEX_MPCORE_PRIV QOM type
hw/cpu/arm: Replace A15MPPrivState by CortexMPPrivState
hw/cpu/arm: Introduce TYPE_A7MPCORE_PRIV for Cortex-A7 MPCore
hw/cpu/arm: Consolidate check on max GIC spi supported
hw/cpu/arm: Create CPUs once in MPCore parent
hw/arm/aspeed_ast2600: Let the A7MPcore create/wire the CPU cores
hw/arm/exynos4210: Let the A9MPcore create/wire the CPU cores
hw/arm/fsl-imx6: Let the A9MPcore create/wire the CPU cores
hw/arm/fsl-imx6ul: Let the A7MPcore create/wire the CPU cores
hw/arm/fsl-imx7: Let the A7MPcore create/wire the CPU cores
hw/arm/highbank: Let the A9/A15MPcore create/wire the CPU cores
hw/arm/vexpress: Let the A9/A15MPcore create/wire the CPU cores
hw/arm/xilinx_zynq: Let the A9MPcore create/wire the CPU cores
hw/arm/npcm7xx: Let the A9MPcore create/wire the CPU cores
hw/cpu/a9mpcore: Remove legacy code
hw/cpu/arm: Remove 'num-cpu' property alias
hw/cpu/arm: Remove use of qemu_get_cpu() in A7/A15 realize()
