> -----Original Message-----
> From: Philippe Mathieu-Daudé <phi...@linaro.org>
> Sent: Friday, October 13, 2023 9:01 AM
> To: qemu-devel@nongnu.org
> Cc: Eduardo Habkost <edua...@habkost.net>; Xiaojuan Yang
> <yangxiaoj...@loongson.cn>; Michael S. Tsirkin <m...@redhat.com>; qemu-
> p...@nongnu.org; Aleksandar Rikalo <aleksandar.rik...@syrmia.com>; David
> Hildenbrand <da...@redhat.com>; qemu-s3...@nongnu.org; Edgar E. Iglesias
> <edgar.igles...@gmail.com>; Jiaxun Yang <jiaxun.y...@flygoat.com>; Song
> Gao <gaos...@loongson.cn>; Philippe Mathieu-Daudé <phi...@linaro.org>;
> Paolo Bonzini <pbonz...@redhat.com>; Stafford Horne <sho...@gmail.com>;
> Alistair Francis <alistair.fran...@wdc.com>; Yanan Wang
> <wangyana...@huawei.com>; Max Filippov <jcmvb...@gmail.com>; Artyom
> Tarasenko <atar4q...@gmail.com>; Marcel Apfelbaum
> <marcel.apfelb...@gmail.com>; Cédric Le Goater <c...@kaod.org>; Laurent
> Vivier <lviv...@redhat.com>; Aurelien Jarno <aurel...@aurel32.net>; qemu-
> ri...@nongnu.org; Palmer Dabbelt <pal...@dabbelt.com>; Yoshinori Sato
> <ys...@users.sourceforge.jp>; Bastian Koppelmann <kbast...@mail.uni-
> paderborn.de>; Bin Meng <bin.m...@windriver.com>; Daniel Henrique
> Barboza <danielhb...@gmail.com>; Mark Cave-Ayland <mark.cave-
> ayl...@ilande.co.uk>; Weiwei Li <liwei...@iscas.ac.cn>; Daniel Henrique
> Barboza <dbarb...@ventanamicro.com>; Nicholas Piggin
> <npig...@gmail.com>; qemu-...@nongnu.org; Liu Zhiwei
> <zhiwei_...@linux.alibaba.com>; Marek Vasut <ma...@denx.de>; Laurent
> Vivier <laur...@vivier.eu>; Peter Maydell <peter.mayd...@linaro.org>; Brian
> Cain <bc...@quicinc.com>; Thomas Huth <th...@redhat.com>; Chris Wulff
> <crwu...@gmail.com>; Sergio Lopez <s...@redhat.com>; Richard Henderson
> <richard.hender...@linaro.org>; Ilya Leoshkevich <i...@linux.ibm.com>;
> Michael Rolnik <mrol...@gmail.com>
> Subject: [PATCH v2 07/16] target/hexagon: Declare QOM definitions in 'cpu-
> qom.h'
>
> WARNING: This email originated from outside of Qualcomm. Please be wary of
> any links or attachments, and do not enable macros.
>
> "target/foo/cpu.h" contains the target specific declarations.
>
> A heterogeneous setup need to access target agnostic declarations
> (at least the QOM ones, to instantiate the objects).
>
> Our convention is to add such target agnostic QOM declarations in
> the "target/foo/cpu-qom.h" header.
>
> Extract QOM definitions from "cpu.h" to "cpu-qom.h".
>
> Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
> ---
> target/hexagon/cpu-qom.h | 28 ++++++++++++++++++++++++++++
> target/hexagon/cpu.h | 15 +--------------
> 2 files changed, 29 insertions(+), 14 deletions(-)
> create mode 100644 target/hexagon/cpu-qom.h
>
> diff --git a/target/hexagon/cpu-qom.h b/target/hexagon/cpu-qom.h
> new file mode 100644
> index 0000000000..f02df7ee6f
> --- /dev/null
> +++ b/target/hexagon/cpu-qom.h
> @@ -0,0 +1,28 @@
> +/*
> + * QEMU Hexagon CPU QOM header (target agnostic)
> + *
> + * Copyright(c) 2019-2023 Qualcomm Innovation Center, Inc. All Rights
> Reserved.
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +
> +#ifndef QEMU_HEXAGON_CPU_QOM_H
> +#define QEMU_HEXAGON_CPU_QOM_H
> +
> +#include "hw/core/cpu.h"
> +#include "qom/object.h"
> +
> +#define TYPE_HEXAGON_CPU "hexagon-cpu"
> +
> +#define HEXAGON_CPU_TYPE_SUFFIX "-" TYPE_HEXAGON_CPU
> +#define HEXAGON_CPU_TYPE_NAME(name) (name
> HEXAGON_CPU_TYPE_SUFFIX)
> +
> +#define TYPE_HEXAGON_CPU_V67 HEXAGON_CPU_TYPE_NAME("v67")
> +#define TYPE_HEXAGON_CPU_V68 HEXAGON_CPU_TYPE_NAME("v68")
> +#define TYPE_HEXAGON_CPU_V69 HEXAGON_CPU_TYPE_NAME("v69")
> +#define TYPE_HEXAGON_CPU_V71 HEXAGON_CPU_TYPE_NAME("v71")
> +#define TYPE_HEXAGON_CPU_V73 HEXAGON_CPU_TYPE_NAME("v73")
> +
> +OBJECT_DECLARE_CPU_TYPE(HexagonCPU, HexagonCPUClass,
> HEXAGON_CPU)
> +
> +#endif
> diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h
> index 035ac4fb6d..7d16083c6a 100644
> --- a/target/hexagon/cpu.h
> +++ b/target/hexagon/cpu.h
> @@ -20,11 +20,10 @@
>
> #include "fpu/softfloat-types.h"
>
> +#include "cpu-qom.h"
> #include "exec/cpu-defs.h"
> #include "hex_regs.h"
> #include "mmvec/mmvec.h"
> -#include "qom/object.h"
> -#include "hw/core/cpu.h"
> #include "hw/registerfields.h"
>
> #define NUM_PREGS 4
> @@ -36,18 +35,8 @@
> #define PRED_WRITES_MAX 5 /* 4 insns + endloop */
> #define VSTORES_MAX 2
>
> -#define TYPE_HEXAGON_CPU "hexagon-cpu"
> -
> -#define HEXAGON_CPU_TYPE_SUFFIX "-" TYPE_HEXAGON_CPU
> -#define HEXAGON_CPU_TYPE_NAME(name) (name
> HEXAGON_CPU_TYPE_SUFFIX)
> #define CPU_RESOLVING_TYPE TYPE_HEXAGON_CPU
>
> -#define TYPE_HEXAGON_CPU_V67 HEXAGON_CPU_TYPE_NAME("v67")
> -#define TYPE_HEXAGON_CPU_V68 HEXAGON_CPU_TYPE_NAME("v68")
> -#define TYPE_HEXAGON_CPU_V69 HEXAGON_CPU_TYPE_NAME("v69")
> -#define TYPE_HEXAGON_CPU_V71 HEXAGON_CPU_TYPE_NAME("v71")
> -#define TYPE_HEXAGON_CPU_V73 HEXAGON_CPU_TYPE_NAME("v73")
> -
> void hexagon_cpu_list(void);
> #define cpu_list hexagon_cpu_list
>
> @@ -127,8 +116,6 @@ typedef struct CPUArchState {
> VTCMStoreLog vtcm_log;
> } CPUHexagonState;
>
> -OBJECT_DECLARE_CPU_TYPE(HexagonCPU, HexagonCPUClass,
> HEXAGON_CPU)
> -
> typedef struct HexagonCPUClass {
> CPUClass parent_class;
>
> --
> 2.41.0
Reviewed-by: Brian Cain <bc...@quicinc.com>
