Index: block-vpc.c =================================================================== RCS file: /sources/qemu/qemu/block-vpc.c,v retrieving revision 1.2 diff -u -1 -0 -r1.2 block-vpc.c --- block-vpc.c 28 Apr 2005 21:09:32 -0000 1.2 +++ block-vpc.c 19 Jun 2006 08:47:30 -0000 @@ -156,21 +156,21 @@ pagetable_index = offset / s->pageentry_size; pageentry_index = (offset % s->pageentry_size) / 512; if (pagetable_index > s->pagetable_entries || s->pagetable[pagetable_index] == 0xffffffff) return -1; // not allocated bitmap_offset = 512 * s->pagetable[pagetable_index]; block_offset = bitmap_offset + 512 + (512 * pageentry_index); -// printf("sector: %llx, index: %x, offset: %x, bioff: %llx, bloff: %llx\n", +// printf("sector: %" PRIx64 ", index: %x, offset: %x, bioff: %" PRIx64 ", bloff: %" PRIx64 "\n", // sector_num, pagetable_index, pageentry_index, // bitmap_offset, block_offset); // disabled by reason #if 0 #ifdef CACHE if (bitmap_offset != s->last_bitmap) { lseek(s->fd, bitmap_offset, SEEK_SET); Index: cpu-defs.h =================================================================== RCS file: /sources/qemu/qemu/cpu-defs.h,v retrieving revision 1.15 diff -u -1 -0 -r1.15 cpu-defs.h --- cpu-defs.h 28 Nov 2005 21:19:04 -0000 1.15 +++ cpu-defs.h 19 Jun 2006 08:47:31 -0000 @@ -40,21 +40,21 @@ #define TARGET_LONG_SIZE (TARGET_LONG_BITS / 8) /* target_ulong is the type of a virtual address */ #if TARGET_LONG_SIZE == 4 typedef int32_t target_long; typedef uint32_t target_ulong; #define TARGET_FMT_lx "%08x" #elif TARGET_LONG_SIZE == 8 typedef int64_t target_long; typedef uint64_t target_ulong; -#define TARGET_FMT_lx "%016llx" +#define TARGET_FMT_lx "%016" PRIx64 #else #error TARGET_LONG_SIZE undefined #endif /* target_phys_addr_t is the type of a physical address (its size can be different from 'target_ulong'). We have sizeof(target_phys_addr) = max(sizeof(unsigned long), sizeof(size_of_target_physical_address)) because we must pass a host pointer to memory operations in some cases */ Index: disas.c =================================================================== RCS file: /sources/qemu/qemu/disas.c,v retrieving revision 1.30 diff -u -1 -0 -r1.30 disas.c --- disas.c 27 Apr 2006 21:05:14 -0000 1.30 +++ disas.c 19 Jun 2006 08:47:31 -0000 @@ -51,36 +51,36 @@ bfd_vma memaddr; struct disassemble_info *info; { if (status != EIO) /* Can't happen. */ (*info->fprintf_func) (info->stream, "Unknown error %d\n", status); else /* Actually, address between memaddr and memaddr + len was out of bounds. */ (*info->fprintf_func) (info->stream, - "Address 0x%llx is out of bounds.\n", memaddr); + "Address 0x%" PRIx64 " is out of bounds.\n", memaddr); } /* This could be in a separate file, to save miniscule amounts of space in statically linked executables. */ /* Just print the address is hex. This is included for completeness even though both GDB and objdump provide their own (to print symbolic addresses). */ void generic_print_address (addr, info) bfd_vma addr; struct disassemble_info *info; { - (*info->fprintf_func) (info->stream, "0x%llx", addr); + (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr); } /* Just return the given address. */ int generic_symbol_at_address (addr, info) bfd_vma addr; struct disassemble_info * info; { return 1; Index: kqemu.c =================================================================== RCS file: /sources/qemu/qemu/kqemu.c,v retrieving revision 1.10 diff -u -1 -0 -r1.10 kqemu.c --- kqemu.c 8 Feb 2006 22:59:35 -0000 1.10 +++ kqemu.c 19 Jun 2006 08:47:32 -0000 @@ -591,26 +591,26 @@ total += r->count; } } qsort(pr, nb_pc_records, sizeof(PCRecord *), pc_rec_cmp); f = fopen("/tmp/kqemu.stats", "w"); if (!f) { perror("/tmp/kqemu.stats"); exit(1); } - fprintf(f, "total: %lld\n", total); + fprintf(f, "total: %" PRId64 "\n", total); sum = 0; for(i = 0; i < nb_pc_records; i++) { r = pr[i]; sum += r->count; - fprintf(f, "%08lx: %lld %0.2f%% %0.2f%%\n", + fprintf(f, "%08lx: %" PRId64 " %0.2f%% %0.2f%%\n", r->pc, r->count, (double)r->count / (double)total * 100.0, (double)sum / (double)total * 100.0); } fclose(f); free(pr); kqemu_record_flush(); } Index: monitor.c =================================================================== RCS file: /sources/qemu/qemu/monitor.c,v retrieving revision 1.49 diff -u -1 -0 -r1.49 monitor.c --- monitor.c 7 May 2006 18:03:31 -0000 1.49 +++ monitor.c 19 Jun 2006 08:47:32 -0000 @@ -526,30 +526,30 @@ case 4: v = (uint32_t)ldl_raw(buf + i); break; case 8: v = ldq_raw(buf + i); break; } term_printf(" "); switch(format) { case 'o': - term_printf("%#*llo", max_digits, v); + term_printf("%#*" PRIo64, max_digits, v); break; case 'x': - term_printf("0x%0*llx", max_digits, v); + term_printf("0x%0*" PRIx64, max_digits, v); break; case 'u': - term_printf("%*llu", max_digits, v); + term_printf("%*" PRIu64, max_digits, v); break; case 'd': - term_printf("%*lld", max_digits, v); + term_printf("%*" PRId64, max_digits, v); break; case 'c': term_printc(v); break; } i += wsize; } term_printf("\n"); addr += l; len -= l; @@ -595,31 +595,31 @@ case 'd': term_printf("%d", val); break; case 'c': term_printc(val); break; } #else switch(format) { case 'o': - term_printf("%#llo", val); + term_printf("%#" PRIo64, val); break; case 'x': - term_printf("%#llx", val); + term_printf("%#" PRIx64, val); break; case 'u': - term_printf("%llu", val); + term_printf("%" PRIu64, val); break; default: case 'd': - term_printf("%lld", val); + term_printf("%" PRId64, val); break; case 'c': term_printc(val); break; } #endif term_printf("\n"); } static void do_sum(uint32_t start, uint32_t size) @@ -1019,25 +1019,25 @@ int64_t kqemu_ret_int_count; int64_t kqemu_ret_excp_count; int64_t kqemu_ret_intr_count; static void do_info_profile(void) { int64_t total; total = qemu_time; if (total == 0) total = 1; - term_printf("async time %lld (%0.3f)\n", + term_printf("async time %" PRId64 " (%0.3f)\n", dev_time, dev_time / (double)ticks_per_sec); - term_printf("qemu time %lld (%0.3f)\n", + term_printf("qemu time %" PRId64 " (%0.3f)\n", qemu_time, qemu_time / (double)ticks_per_sec); - term_printf("kqemu time %lld (%0.3f %0.1f%%) count=%lld int=%lld excp=%lld intr=%lld\n", + term_printf("kqemu time %" PRId64 " (%0.3f %0.1f%%) count=%" PRId64 " int=%" PRId64 " excp=%" PRId64 " intr=%" PRId64 "\n", kqemu_time, kqemu_time / (double)ticks_per_sec, kqemu_time / (double)total * 100.0, kqemu_exec_count, kqemu_ret_int_count, kqemu_ret_excp_count, kqemu_ret_intr_count); qemu_time = 0; kqemu_time = 0; kqemu_exec_count = 0; dev_time = 0; Index: vl.c =================================================================== RCS file: /sources/qemu/qemu/vl.c,v retrieving revision 1.189 diff -u -1 -0 -r1.189 vl.c --- vl.c 14 Jun 2006 17:32:25 -0000 1.189 +++ vl.c 19 Jun 2006 08:47:35 -0000 @@ -909,21 +909,21 @@ static int count; ti = qemu_get_clock(vm_clock); if (last_clock != 0) { delta = ti - last_clock; if (delta < delta_min) delta_min = delta; if (delta > delta_max) delta_max = delta; delta_cum += delta; if (++count == DISP_FREQ) { - printf("timer: min=%lld us max=%lld us avg=%lld us avg_freq=%0.3f Hz\n", + printf("timer: min=%" PRId64 " us max=%" PRId64 " us avg=%" PRId64 " us avg_freq=%0.3f Hz\n", muldiv64(delta_min, 1000000, ticks_per_sec), muldiv64(delta_max, 1000000, ticks_per_sec), muldiv64(delta_cum, 1000000 / DISP_FREQ, ticks_per_sec), (double)ticks_per_sec / ((double)delta_cum / DISP_FREQ)); count = 0; delta_min = INT64_MAX; delta_max = 0; delta_cum = 0; } } Index: vl.h =================================================================== RCS file: /sources/qemu/qemu/vl.h,v retrieving revision 1.129 diff -u -1 -0 -r1.129 vl.h --- vl.h 18 Jun 2006 19:41:28 -0000 1.129 +++ vl.h 19 Jun 2006 08:47:35 -0000 @@ -43,30 +43,34 @@ #define O_LARGEFILE 0 #endif #ifndef O_BINARY #define O_BINARY 0 #endif #ifdef _WIN32 #define fsync _commit #define lseek _lseeki64 #define ENOTSUP 4096 /* XXX: find 64 bit version */ #define ftruncate chsize + static inline char *realpath(const char *path, char *resolved_path) { _fullpath(resolved_path, path, _MAX_PATH); return resolved_path; } #define PRId64 "I64d" +#define PRIx64 "I64x" +#define PRIu64 "I64u" +#define PRIo64 "I64o" #endif #ifdef QEMU_TOOL /* we use QEMU_TOOL in the command line tools which do not depend on the target CPU type */ #include "config-host.h" #include #include "osdep.h" #include "bswap.h" Index: audio/audio.c =================================================================== RCS file: /sources/qemu/qemu/audio/audio.c,v retrieving revision 1.9 diff -u -1 -0 -r1.9 audio.c --- audio/audio.c 20 Nov 2005 16:24:34 -0000 1.9 +++ audio/audio.c 19 Jun 2006 08:47:36 -0000 @@ -990,21 +990,21 @@ return 0; } live = sw->hw->total_samples_captured - sw->total_hw_samples_acquired; if (audio_bug (AUDIO_FUNC, live < 0 || live > sw->hw->samples)) { dolog ("live=%d sw->hw->samples=%d\n", live, sw->hw->samples); return 0; } ldebug ( - "%s: get_avail live %d ret %lld\n", + "%s: get_avail live %d ret %" PRId64 "\n", SW_NAME (sw), live, (((int64_t) live << 32) / sw->ratio) << sw->info.shift ); return (((int64_t) live << 32) / sw->ratio) << sw->info.shift; } static int audio_get_free (SWVoiceOut *sw) { int live, dead; @@ -1016,21 +1016,21 @@ live = sw->total_hw_samples_mixed; if (audio_bug (AUDIO_FUNC, live < 0 || live > sw->hw->samples)) { dolog ("live=%d sw->hw->samples=%d\n", live, sw->hw->samples); return 0; } dead = sw->hw->samples - live; #ifdef DEBUG_OUT - dolog ("%s: get_free live %d dead %d ret %lld\n", + dolog ("%s: get_free live %d dead %d ret %" PRId64 "\n", SW_NAME (sw), live, dead, (((int64_t) dead << 32) / sw->ratio) << sw->info.shift); #endif return (((int64_t) dead << 32) / sw->ratio) << sw->info.shift; } static void audio_run_out (AudioState *s) { HWVoiceOut *hw = NULL; Index: audio/audio_template.h =================================================================== RCS file: /sources/qemu/qemu/audio/audio_template.h,v retrieving revision 1.4 diff -u -1 -0 -r1.4 audio_template.h --- audio/audio_template.h 20 Nov 2005 16:24:34 -0000 1.4 +++ audio/audio_template.h 19 Jun 2006 08:47:36 -0000 @@ -535,21 +535,21 @@ uint64_t glue (AUD_get_elapsed_usec_, TYPE) (SW *sw, QEMUAudioTimeStamp *ts) { uint64_t delta, cur_ts, old_ts; if (!sw) { return 0; } cur_ts = sw->hw->ts_helper; old_ts = ts->old_ts; - /* dolog ("cur %lld old %lld\n", cur_ts, old_ts); */ + /* dolog ("cur %" PRId64 " old %" PRId64 "\n", cur_ts, old_ts); */ if (cur_ts >= old_ts) { delta = cur_ts - old_ts; } else { delta = UINT64_MAX - old_ts + cur_ts; } if (!delta) { return 0; Index: hw/apic.c =================================================================== RCS file: /sources/qemu/qemu/hw/apic.c,v retrieving revision 1.8 diff -u -1 -0 -r1.8 apic.c --- hw/apic.c 17 Dec 2005 01:27:28 -0000 1.8 +++ hw/apic.c 19 Jun 2006 08:47:37 -0000 @@ -232,37 +232,37 @@ } foreach_apic(apic_iter, deliver_bitmask, apic_set_irq(apic_iter, vector_num, trigger_mode) ); } void cpu_set_apic_base(CPUState *env, uint64_t val) { APICState *s = env->apic_state; #ifdef DEBUG_APIC - printf("cpu_set_apic_base: %016llx\n", val); + printf("cpu_set_apic_base: %016" PRIx64 "\n", val); #endif s->apicbase = (val & 0xfffff000) | (s->apicbase & (MSR_IA32_APICBASE_BSP | MSR_IA32_APICBASE_ENABLE)); /* if disabled, cannot be enabled again */ if (!(val & MSR_IA32_APICBASE_ENABLE)) { s->apicbase &= ~MSR_IA32_APICBASE_ENABLE; env->cpuid_features &= ~CPUID_APIC; s->spurious_vec &= ~APIC_SV_ENABLE; } } uint64_t cpu_get_apic_base(CPUState *env) { APICState *s = env->apic_state; #ifdef DEBUG_APIC - printf("cpu_get_apic_base: %016llx\n", (uint64_t)s->apicbase); + printf("cpu_get_apic_base: %016" PRIx64 "\n", (uint64_t)s->apicbase); #endif return s->apicbase; } void cpu_set_apic_tpr(CPUX86State *env, uint8_t val) { APICState *s = env->apic_state; s->tpr = (val & 0x0f) << 4; apic_update_irq(s); } Index: hw/cuda.c =================================================================== RCS file: /sources/qemu/qemu/hw/cuda.c,v retrieving revision 1.10 diff -u -1 -0 -r1.10 cuda.c --- hw/cuda.c 23 Jul 2005 14:01:47 -0000 1.10 +++ hw/cuda.c 19 Jun 2006 08:47:37 -0000 @@ -202,21 +202,21 @@ /* Note: we consider the irq is raised on 0 */ if (counter == 0xffff) { next_time = d + s->latch + 1; } else if (counter == 0) { next_time = d + s->latch + 2; } else { next_time = d + counter; } #if 0 #ifdef DEBUG_CUDA - printf("latch=%d counter=%lld delta_next=%lld\n", + printf("latch=%d counter=%" PRId64 " delta_next=%" PRId64 "\n", s->latch, d, next_time - d); #endif #endif next_time = muldiv64(next_time, ticks_per_sec, CUDA_TIMER_FREQ) + s->load_time; if (next_time <= current_time) next_time = current_time + 1; return next_time; } Index: hw/i8259.c =================================================================== RCS file: /sources/qemu/qemu/hw/i8259.c,v retrieving revision 1.18 diff -u -1 -0 -r1.18 i8259.c --- hw/i8259.c 29 Apr 2006 15:52:14 -0000 1.18 +++ hw/i8259.c 19 Jun 2006 08:47:37 -0000 @@ -524,21 +524,21 @@ #ifndef DEBUG_IRQ_COUNT term_printf("irq statistic code not compiled.\n"); #else int i; int64_t count; term_printf("IRQ statistics:\n"); for (i = 0; i < 16; i++) { count = irq_count[i]; if (count > 0) - term_printf("%2d: %lld\n", i, count); + term_printf("%2d: %" PRId64 "\n", i, count); } #endif } PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque) { PicState2 *s; s = qemu_mallocz(sizeof(PicState2)); if (!s) return NULL; Index: hw/mips_r4k.c =================================================================== RCS file: /sources/qemu/qemu/hw/mips_r4k.c,v retrieving revision 1.17 diff -u -1 -0 -r1.17 mips_r4k.c --- hw/mips_r4k.c 11 May 2006 21:15:08 -0000 1.17 +++ hw/mips_r4k.c 19 Jun 2006 08:47:38 -0000 @@ -53,21 +53,21 @@ tmp = count; if (count == compare) tmp++; now = qemu_get_clock(vm_clock); next = now + muldiv64(compare - tmp, ticks_per_sec, 100 * 1000 * 1000); if (next == now) next++; #if 0 if (logfile) { - fprintf(logfile, "%s: 0x%08llx %08x %08x => 0x%08llx\n", + fprintf(logfile, "%s: 0x%08" PRIx64 " %08x %08x => 0x%08" PRIx64 "\n", __func__, now, count, compare, next - now); } #endif /* Store new count and compare registers */ env->CP0_Compare = compare; env->CP0_Count = count - (uint32_t)muldiv64(now, 100 * 1000 * 1000, ticks_per_sec); /* Adjust timer */ qemu_mod_timer(env->timer, next); } Index: hw/sb16.c =================================================================== RCS file: /sources/qemu/qemu/hw/sb16.c,v retrieving revision 1.19 diff -u -1 -0 -r1.19 sb16.c --- hw/sb16.c 20 Nov 2005 16:20:39 -0000 1.19 +++ hw/sb16.c 19 Jun 2006 08:47:40 -0000 @@ -758,21 +758,21 @@ pic_set_irq (s->irq, 1); } else { if (s->aux_ts) { qemu_mod_timer ( s->aux_ts, qemu_get_clock (vm_clock) + ticks ); } } - ldebug ("mix silence %d %d %lld\n", samples, bytes, ticks); + ldebug ("mix silence %d %d %" PRId64 "\n", samples, bytes, ticks); } break; case 0xe0: d0 = dsp_get_data (s); s->out_data_len = 0; ldebug ("E0 data = %#x\n", d0); dsp_out_data (s, ~d0); break; Index: hw/sh7750.c =================================================================== RCS file: /sources/qemu/qemu/hw/sh7750.c,v retrieving revision 1.1 diff -u -1 -0 -r1.1 sh7750.c --- hw/sh7750.c 27 Apr 2006 21:32:09 -0000 1.1 +++ hw/sh7750.c 19 Jun 2006 08:47:40 -0000 @@ -117,21 +117,21 @@ else prescaler = 4 << (s->tcr0 & 3); now = qemu_get_clock(vm_clock); /* XXXXX */ next = now + muldiv64(prescaler * s->tcnt0, ticks_per_sec, s->periph_freq); if (next == now) next = now + 1; - fprintf(stderr, "now=%016llx, next=%016llx\n", now, next); + fprintf(stderr, "now=%016" PRIx64 ", next=%016" PRIx64 "\n", now, next); fprintf(stderr, "timer will underflow in %f seconds\n", (float) (next - now) / (float) ticks_per_sec); qemu_mod_timer(s->timer0, next); } static void timer_start_changed(SH7750State * s) { if (s->tstr & SH7750_TSTR_STR0) { start_timer0(s); Index: hw/slavio_intctl.c =================================================================== RCS file: /sources/qemu/qemu/hw/slavio_intctl.c,v retrieving revision 1.6 diff -u -1 -0 -r1.6 slavio_intctl.c --- hw/slavio_intctl.c 5 Dec 2005 20:31:52 -0000 1.6 +++ hw/slavio_intctl.c 19 Jun 2006 08:47:41 -0000 @@ -196,21 +196,21 @@ term_printf("irq statistic code not compiled.\n"); #else SLAVIO_INTCTLState *s = opaque; int i; int64_t count; term_printf("IRQ statistics:\n"); for (i = 0; i < 32; i++) { count = s->irq_count[i]; if (count > 0) - term_printf("%2d: %lld\n", i, count); + term_printf("%2d: %" PRId64 "\n", i, count); } #endif } static const uint32_t intbit_to_level[32] = { 2, 3, 5, 7, 9, 11, 0, 14, 3, 5, 7, 9, 11, 13, 12, 12, 6, 0, 4, 10, 8, 0, 11, 0, 0, 0, 0, 0, 15, 0, 15, 0, }; static void slavio_check_interrupts(void *opaque) Index: hw/slavio_timer.c =================================================================== RCS file: /sources/qemu/qemu/hw/slavio_timer.c,v retrieving revision 1.3 diff -u -1 -0 -r1.3 slavio_timer.c --- hw/slavio_timer.c 5 Dec 2005 20:31:52 -0000 1.3 +++ hw/slavio_timer.c 19 Jun 2006 08:47:41 -0000 @@ -93,21 +93,21 @@ // Calculate what the counter should be, convert to register // units count = diff % limit; s->count = count << 9; s->counthigh = count >> 22; // Expire time: CPU ticks left to next interrupt // Convert remaining counter ticks to CPU ticks s->expire_time = ticks + muldiv64(limit - count, ticks_per_sec, CNT_FREQ); - DPRINTF("irq %d limit %d reached %d d %lld count %d s->c %x diff %lld stopped %d mode %d\n", s->irq, limit, s->reached?1:0, (ticks-s->count_load_time), count, s->count, s->expire_time - ticks, s->stopped, s->mode); + DPRINTF("irq %d limit %d reached %d d %" PRId64 " count %d s->c %x diff %" PRId64 " stopped %d mode %d\n", s->irq, limit, s->reached?1:0, (ticks-s->count_load_time), count, s->count, s->expire_time - ticks, s->stopped, s->mode); if (s->mode != 1) pic_set_irq_cpu(s->irq, out, s->cpu); } // timer callback static void slavio_timer_irq(void *opaque) { SLAVIO_TIMERState *s = opaque; Index: target-arm/nwfpe/fpa11_cprt.c =================================================================== RCS file: /sources/qemu/qemu/target-arm/nwfpe/fpa11_cprt.c,v retrieving revision 1.2 diff -u -1 -0 -r1.2 fpa11_cprt.c --- target-arm/nwfpe/fpa11_cprt.c 13 Mar 2005 16:55:58 -0000 1.2 +++ target-arm/nwfpe/fpa11_cprt.c 19 Jun 2006 08:47:41 -0000 @@ -126,21 +126,21 @@ { case typeSingle: { writeRegister(getRd(opcode), float32_to_int32(fpa11->fpreg[Fn].fSingle, &fpa11->fp_status)); } break; case typeDouble: { - //printf("F%d is 0x%llx\n",Fn,fpa11->fpreg[Fn].fDouble); + //printf("F%d is 0x%" PRIx64 "\n",Fn,fpa11->fpreg[Fn].fDouble); writeRegister(getRd(opcode), float64_to_int32(fpa11->fpreg[Fn].fDouble, &fpa11->fp_status)); } break; case typeExtended: { writeRegister(getRd(opcode), floatx80_to_int32(fpa11->fpreg[Fn].fExtended, &fpa11->fp_status)); } Index: target-i386/helper.c =================================================================== RCS file: /sources/qemu/qemu/target-i386/helper.c,v retrieving revision 1.65 diff -u -1 -0 -r1.65 helper.c --- target-i386/helper.c 3 May 2006 19:17:26 -0000 1.65 +++ target-i386/helper.c 19 Jun 2006 08:47:42 -0000 @@ -3245,21 +3245,21 @@ v = (uint64_t)a0 * (uint64_t)b1; add128(plow, phigh, v << 32, v >> 32); v = (uint64_t)a1 * (uint64_t)b0; add128(plow, phigh, v << 32, v >> 32); v = (uint64_t)a1 * (uint64_t)b1; *phigh += v; #ifdef DEBUG_MULDIV - printf("mul: 0x%016llx * 0x%016llx = 0x%016llx%016llx\n", + printf("mul: 0x%016" PRIx64 " * 0x%016" PRIx64 " = 0x%016" PRIx64 "%016" PRIx64 "\n", a, b, *phigh, *plow); #endif } static void imul64(uint64_t *plow, uint64_t *phigh, int64_t a, int64_t b) { int sa, sb; sa = (a < 0); if (sa) a = -a; @@ -3294,21 +3294,21 @@ a1 = (a1 << 1) | (a0 >> 63); if (ab || a1 >= b) { a1 -= b; qb = 1; } else { qb = 0; } a0 = (a0 << 1) | qb; } #if defined(DEBUG_MULDIV) - printf("div: 0x%016llx%016llx / 0x%016llx: q=0x%016llx r=0x%016llx\n", + printf("div: 0x%016" PRIx64 "%016" PRIx64 " / 0x%016" PRIx64 ": q=0x%016" PRIx64 " r=0x%016" PRIx64 "\n", *phigh, *plow, b, a0, a1); #endif *plow = a0; *phigh = a1; } return 0; } /* return TRUE if overflow */ static int idiv64(uint64_t *plow, uint64_t *phigh, int64_t b) Index: target-i386/helper2.c =================================================================== RCS file: /sources/qemu/qemu/target-i386/helper2.c,v retrieving revision 1.42 diff -u -1 -0 -r1.42 helper2.c --- target-i386/helper2.c 14 Jun 2006 13:37:16 -0000 1.42 +++ target-i386/helper2.c 19 Jun 2006 08:47:42 -0000 @@ -257,25 +257,25 @@ int flags) { int eflags, i, nb; char cc_op_name[32]; static const char *seg_name[6] = { "ES", "CS", "SS", "DS", "FS", "GS" }; eflags = env->eflags; #ifdef TARGET_X86_64 if (env->hflags & HF_CS64_MASK) { cpu_fprintf(f, - "RAX=%016llx RBX=%016llx RCX=%016llx RDX=%016llx\n" - "RSI=%016llx RDI=%016llx RBP=%016llx RSP=%016llx\n" - "R8 =%016llx R9 =%016llx R10=%016llx R11=%016llx\n" - "R12=%016llx R13=%016llx R14=%016llx R15=%016llx\n" - "RIP=%016llx RFL=%08x [%c%c%c%c%c%c%c] CPL=%d II=%d A20=%d HLT=%d\n", + "RAX=%016" PRIx64 " RBX=%016" PRIx64 " RCX=%016" PRIx64 " RDX=%016" PRIx64 "\n" + "RSI=%016" PRIx64 " RDI=%016" PRIx64 " RBP=%016" PRIx64 " RSP=%016" PRIx64 "\n" + "R8 =%016" PRIx64 " R9 =%016" PRIx64 " R10=%016" PRIx64 " R11=%016" PRIx64 "\n" + "R12=%016" PRIx64 " R13=%016" PRIx64 " R14=%016" PRIx64 " R15=%016" PRIx64 "\n" + "RIP=%016" PRIx64 " RFL=%08x [%c%c%c%c%c%c%c] CPL=%d II=%d A20=%d HLT=%d\n", env->regs[R_EAX], env->regs[R_EBX], env->regs[R_ECX], env->regs[R_EDX], env->regs[R_ESI], env->regs[R_EDI], env->regs[R_EBP], env->regs[R_ESP], env->regs[8], env->regs[9], @@ -322,42 +322,42 @@ env->hflags & HF_CPL_MASK, (env->hflags >> HF_INHIBIT_IRQ_SHIFT) & 1, (env->a20_mask >> 20) & 1, (env->hflags >> HF_HALTED_SHIFT) & 1); } #ifdef TARGET_X86_64 if (env->hflags & HF_LMA_MASK) { for(i = 0; i < 6; i++) { SegmentCache *sc = &env->segs[i]; - cpu_fprintf(f, "%s =%04x %016llx %08x %08x\n", + cpu_fprintf(f, "%s =%04x %016" PRIx64 " %08x %08x\n", seg_name[i], sc->selector, sc->base, sc->limit, sc->flags); } - cpu_fprintf(f, "LDT=%04x %016llx %08x %08x\n", + cpu_fprintf(f, "LDT=%04x %016" PRIx64 " %08x %08x\n", env->ldt.selector, env->ldt.base, env->ldt.limit, env->ldt.flags); - cpu_fprintf(f, "TR =%04x %016llx %08x %08x\n", + cpu_fprintf(f, "TR =%04x %016" PRIx64 " %08x %08x\n", env->tr.selector, env->tr.base, env->tr.limit, env->tr.flags); - cpu_fprintf(f, "GDT= %016llx %08x\n", + cpu_fprintf(f, "GDT= %016" PRIx64 " %08x\n", env->gdt.base, env->gdt.limit); - cpu_fprintf(f, "IDT= %016llx %08x\n", + cpu_fprintf(f, "IDT= %016" PRIx64 " %08x\n", env->idt.base, env->idt.limit); - cpu_fprintf(f, "CR0=%08x CR2=%016llx CR3=%016llx CR4=%08x\n", + cpu_fprintf(f, "CR0=%08x CR2=%016" PRIx64 " CR3=%016" PRIx64 " CR4=%08x\n", (uint32_t)env->cr[0], env->cr[2], env->cr[3], (uint32_t)env->cr[4]); } else #endif { for(i = 0; i < 6; i++) { SegmentCache *sc = &env->segs[i]; cpu_fprintf(f, "%s =%04x %08x %08x %08x\n", @@ -387,21 +387,21 @@ (uint32_t)env->cr[3], (uint32_t)env->cr[4]); } if (flags & X86_DUMP_CCOP) { if ((unsigned)env->cc_op < CC_OP_NB) snprintf(cc_op_name, sizeof(cc_op_name), "%s", cc_op_str[env->cc_op]); else snprintf(cc_op_name, sizeof(cc_op_name), "[%d]", env->cc_op); #ifdef TARGET_X86_64 if (env->hflags & HF_CS64_MASK) { - cpu_fprintf(f, "CCS=%016llx CCD=%016llx CCO=%-8s\n", + cpu_fprintf(f, "CCS=%016" PRIx64 " CCD=%016" PRIx64 " CCO=%-8s\n", env->cc_src, env->cc_dst, cc_op_name); } else #endif { cpu_fprintf(f, "CCS=%08x CCD=%08x CCO=%-8s\n", (uint32_t)env->cc_src, (uint32_t)env->cc_dst, cc_op_name); } } @@ -420,24 +420,24 @@ for(i=0;i<8;i++) { #if defined(USE_X86LDOUBLE) union { long double d; struct { uint64_t lower; uint16_t upper; } l; } tmp; tmp.d = env->fpregs[i].d; - cpu_fprintf(f, "FPR%d=%016llx %04x", + cpu_fprintf(f, "FPR%d=%016" PRIx64 " %04x", i, tmp.l.lower, tmp.l.upper); #else - cpu_fprintf(f, "FPR%d=%016llx", + cpu_fprintf(f, "FPR%d=%016" PRIx64, i, env->fpregs[i].mmx.q); #endif if ((i & 1) == 1) cpu_fprintf(f, "\n"); else cpu_fprintf(f, " "); } if (env->hflags & HF_CS64_MASK) nb = 16; else Index: target-ppc/translate.c =================================================================== RCS file: /sources/qemu/qemu/target-ppc/translate.c,v retrieving revision 1.41 diff -u -1 -0 -r1.41 translate.c --- target-ppc/translate.c 22 May 2006 21:50:20 -0000 1.41 +++ target-ppc/translate.c 19 Jun 2006 08:47:43 -0000 @@ -2436,26 +2436,26 @@ #include "translate_init.c" /*****************************************************************************/ /* Misc PowerPC helpers */ void cpu_dump_state(CPUState *env, FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...), int flags) { #if defined(TARGET_PPC64) || 1 #define FILL "" -#define REGX "%016llx" +#define REGX "%016" PRIx64 #define RGPL 4 #define RFPL 4 #else #define FILL " " -#define REGX "%08llx" +#define REGX "%08" PRIx64 #define RGPL 8 #define RFPL 4 #endif int i; cpu_fprintf(f, "NIP " REGX " LR " REGX " CTR " REGX "\n", env->nip, env->lr, env->ctr); cpu_fprintf(f, "MSR " REGX FILL " XER %08x TB %08x %08x DECR %08x\n", do_load_msr(env), do_load_xer(env), cpu_ppc_load_tbu(env), @@ -2478,21 +2478,21 @@ else if (env->crf[i] & 0x04) a = 'G'; else if (env->crf[i] & 0x02) a = 'E'; cpu_fprintf(f, " %c%c", a, env->crf[i] & 0x01 ? 'O' : ' '); } cpu_fprintf(f, " ] " FILL "RES " REGX "\n", env->reserve); for (i = 0; i < 32; i++) { if ((i & (RFPL - 1)) == 0) cpu_fprintf(f, "FPR%02d", i); - cpu_fprintf(f, " %016llx", *((uint64_t *)&env->fpr[i])); + cpu_fprintf(f, " %016" PRIx64, *((uint64_t *)&env->fpr[i])); if ((i & (RFPL - 1)) == (RFPL - 1)) cpu_fprintf(f, "\n"); } cpu_fprintf(f, "SRR0 " REGX " SRR1 " REGX " " FILL FILL FILL "SDR1 " REGX "\n", env->spr[SPR_SRR0], env->spr[SPR_SRR1], env->sdr1); #undef REGX #undef RGPL #undef RFPL Index: target-ppc/translate_init.c =================================================================== RCS file: /sources/qemu/qemu/target-ppc/translate_init.c,v retrieving revision 1.2 diff -u -1 -0 -r1.2 translate_init.c --- target-ppc/translate_init.c 21 Nov 2005 23:32:20 -0000 1.2 +++ target-ppc/translate_init.c 19 Jun 2006 08:47:43 -0000 @@ -245,21 +245,21 @@ ppc_spr_t *spr; spr = &env->spr_cb[num]; if (spr->name != NULL ||env-> spr[num] != 0x00000000 || spr->uea_read != NULL || spr->uea_write != NULL || spr->oea_read != NULL || spr->oea_write != NULL) { printf("Error: Trying to register SPR %d (%03x) twice !\n", num, num); exit(1); } #if defined(PPC_DEBUG_SPR) - printf("*** register spr %d (%03x) %s val %08llx\n", num, num, name, + printf("*** register spr %d (%03x) %s val %08" PRIx64 "\n", num, num, name, (unsigned long long)initial_value); #endif spr->name = name; spr->uea_read = uea_read; spr->uea_write = uea_write; spr->oea_read = oea_read; spr->oea_write = oea_write; env->spr[num] = initial_value; } Index: target-sparc/helper.c =================================================================== RCS file: /sources/qemu/qemu/target-sparc/helper.c,v retrieving revision 1.22 diff -u -1 -0 -r1.22 helper.c --- target-sparc/helper.c 14 Jun 2006 12:37:30 -0000 1.22 +++ target-sparc/helper.c 19 Jun 2006 08:47:43 -0000 @@ -387,33 +387,33 @@ // valid, access ok? if ((env->dtlb_tte[i] & 0x8000000000000000ULL) == 0 || ((env->dtlb_tte[i] & 0x4) && is_user) || (!(env->dtlb_tte[i] & 0x2) && (rw == 1))) { if (env->dmmuregs[3]) /* Fault status register */ env->dmmuregs[3] = 2; /* overflow (not read before another fault) */ env->dmmuregs[3] |= (is_user << 3) | ((rw == 1) << 2) | 1; env->dmmuregs[4] = address; /* Fault address register */ env->exception_index = TT_DFAULT; #ifdef DEBUG_MMU - printf("DFAULT at 0x%llx\n", address); + printf("DFAULT at 0x%" PRIx64 "\n", address); #endif return 1; } *physical = (env->dtlb_tte[i] & mask & 0x1fffffff000ULL) + (address & ~mask & 0x1fffffff000ULL); *prot = PAGE_READ; if (env->dtlb_tte[i] & 0x2) *prot |= PAGE_WRITE; return 0; } } #ifdef DEBUG_MMU - printf("DMISS at 0x%llx\n", address); + printf("DMISS at 0x%" PRIx64 "\n", address); #endif env->exception_index = TT_DMISS; return 1; } static int get_physical_address_code(CPUState *env, target_phys_addr_t *physical, int *prot, int *access_index, target_ulong address, int rw, int is_user) { target_ulong mask; @@ -445,31 +445,31 @@ if (env->dmmuregs[1] == (env->itlb_tag[i] & 0x1fff) && (address & mask) == (env->itlb_tag[i] & ~0x1fffULL)) { // valid, access ok? if ((env->itlb_tte[i] & 0x8000000000000000ULL) == 0 || ((env->itlb_tte[i] & 0x4) && is_user)) { if (env->immuregs[3]) /* Fault status register */ env->immuregs[3] = 2; /* overflow (not read before another fault) */ env->immuregs[3] |= (is_user << 3) | 1; env->exception_index = TT_TFAULT; #ifdef DEBUG_MMU - printf("TFAULT at 0x%llx\n", address); + printf("TFAULT at 0x%" PRIx64 "\n", address); #endif return 1; } *physical = (env->itlb_tte[i] & mask & 0x1fffffff000ULL) + (address & ~mask & 0x1fffffff000ULL); *prot = PAGE_EXEC; return 0; } } #ifdef DEBUG_MMU - printf("TMISS at 0x%llx\n", address); + printf("TMISS at 0x%" PRIx64 "\n", address); #endif env->exception_index = TT_TMISS; return 1; } int get_physical_address(CPUState *env, target_phys_addr_t *physical, int *prot, int *access_index, target_ulong address, int rw, int is_user) { if (rw == 2) @@ -484,36 +484,36 @@ { target_ulong virt_addr, vaddr; target_phys_addr_t paddr; int error_code = 0, prot, ret = 0, access_index; error_code = get_physical_address(env, &paddr, &prot, &access_index, address, rw, is_user); if (error_code == 0) { virt_addr = address & TARGET_PAGE_MASK; vaddr = virt_addr + ((address & TARGET_PAGE_MASK) & (TARGET_PAGE_SIZE - 1)); #ifdef DEBUG_MMU - printf("Translate at 0x%llx -> 0x%llx, vaddr 0x%llx\n", address, paddr, vaddr); + printf("Translate at 0x%" PRIx64 " -> 0x%" PRIx64 ", vaddr 0x%" PRIx64 "\n", address, paddr, vaddr); #endif ret = tlb_set_page_exec(env, vaddr, paddr, prot, is_user, is_softmmu); return ret; } // XXX return 1; } #ifdef DEBUG_MMU void dump_mmu(CPUState *env) { unsigned int i; const char *mask; - printf("MMU contexts: Primary: %lld, Secondary: %lld\n", env->dmmuregs[1], env->dmmuregs[2]); + printf("MMU contexts: Primary: %" PRId64 ", Secondary: %" PRId64 "\n", env->dmmuregs[1], env->dmmuregs[2]); if ((env->lsu & DMMU_E) == 0) { printf("DMMU disabled\n"); } else { printf("DMMU dump:\n"); for (i = 0; i < 64; i++) { switch ((env->dtlb_tte[i] >> 61) & 3) { default: case 0x0: mask = " 8k"; break; @@ -521,21 +521,21 @@ mask = " 64k"; break; case 0x2: mask = "512k"; break; case 0x3: mask = " 4M"; break; } if ((env->dtlb_tte[i] & 0x8000000000000000ULL) != 0) { - printf("VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_lx ", %s, %s, %s, %s, ctx %lld\n", + printf("VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_lx ", %s, %s, %s, %s, ctx %" PRId64 "\n", env->dtlb_tag[i] & ~0x1fffULL, env->dtlb_tte[i] & 0x1ffffffe000ULL, mask, env->dtlb_tte[i] & 0x4? "priv": "user", env->dtlb_tte[i] & 0x2? "RW": "RO", env->dtlb_tte[i] & 0x40? "locked": "unlocked", env->dtlb_tag[i] & 0x1fffULL); } } } @@ -553,21 +553,21 @@ mask = " 64k"; break; case 0x2: mask = "512k"; break; case 0x3: mask = " 4M"; break; } if ((env->itlb_tte[i] & 0x8000000000000000ULL) != 0) { - printf("VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_lx ", %s, %s, %s, ctx %lld\n", + printf("VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_lx ", %s, %s, %s, ctx %" PRId64 "\n", env->itlb_tag[i] & ~0x1fffULL, env->itlb_tte[i] & 0x1ffffffe000ULL, mask, env->itlb_tte[i] & 0x4? "priv": "user", env->itlb_tte[i] & 0x40? "locked": "unlocked", env->itlb_tag[i] & 0x1fffULL); } } } } Index: target-sparc/op_helper.c =================================================================== RCS file: /sources/qemu/qemu/target-sparc/op_helper.c,v retrieving revision 1.19 diff -u -1 -0 -r1.19 op_helper.c --- target-sparc/op_helper.c 21 Nov 2005 23:32:42 -0000 1.19 +++ target-sparc/op_helper.c 19 Jun 2006 08:47:44 -0000 @@ -576,21 +576,21 @@ case 0x45: // LSU { uint64_t oldreg; oldreg = env->lsu; env->lsu = T1 & (DMMU_E | IMMU_E); // Mappings generated during D/I MMU disabled mode are // invalid in normal mode if (oldreg != env->lsu) { #ifdef DEBUG_MMU - printf("LSU change: 0x%llx -> 0x%llx\n", oldreg, env->lsu); + printf("LSU change: 0x%" PRIx64 " -> 0x%" PRIx64 "\n", oldreg, env->lsu); dump_mmu(env); #endif tlb_flush(env, 1); } return; } case 0x50: // I-MMU regs { int reg = (T0 >> 3) & 0xf; uint64_t oldreg; @@ -610,21 +610,21 @@ T1 = 0; // Clear SFSR break; case 5: // TSB access case 6: // Tag access default: break; } env->immuregs[reg] = T1; #ifdef DEBUG_MMU if (oldreg != env->immuregs[reg]) { - printf("mmu change reg[%d]: 0x%08llx -> 0x%08llx\n", reg, oldreg, env->immuregs[reg]); + printf("mmu change reg[%d]: 0x%08" PRIx64 " -> 0x%08" PRIx64 "\n", reg, oldreg, env->immuregs[reg]); } dump_mmu(env); #endif return; } case 0x54: // I-MMU data in { unsigned int i; // Try finding an invalid entry @@ -679,21 +679,21 @@ case 5: // TSB access case 6: // Tag access case 7: // Virtual Watchpoint case 8: // Physical Watchpoint default: break; } env->dmmuregs[reg] = T1; #ifdef DEBUG_MMU if (oldreg != env->dmmuregs[reg]) { - printf("mmu change reg[%d]: 0x%08llx -> 0x%08llx\n", reg, oldreg, env->dmmuregs[reg]); + printf("mmu change reg[%d]: 0x%08" PRIx64 " -> 0x%08" PRIx64 "\n", reg, oldreg, env->dmmuregs[reg]); } dump_mmu(env); #endif return; } case 0x5c: // D-MMU data in { unsigned int i; // Try finding an invalid entry @@ -912,21 +912,21 @@ REGWPTR = saved_regwptr; #endif } #ifdef TARGET_SPARC64 void do_interrupt(int intno) { #ifdef DEBUG_PCALL if (loglevel & CPU_LOG_INT) { static int count; - fprintf(logfile, "%6d: v=%04x pc=%016llx npc=%016llx SP=%016llx\n", + fprintf(logfile, "%6d: v=%04x pc=%016" PRIx64 " npc=%016" PRIx64 " SP=%016" PRIx64 "\n", count, intno, env->pc, env->npc, env->regwptr[6]); cpu_dump_state(env, logfile, fprintf, 0); #if 0 { int i; uint8_t *ptr; fprintf(logfile, " code="); Index: tests/test-i386.c =================================================================== RCS file: /sources/qemu/qemu/tests/test-i386.c,v retrieving revision 1.49 diff -u -1 -0 -r1.49 test-i386.c --- tests/test-i386.c 23 Apr 2005 17:54:59 -0000 1.49 +++ tests/test-i386.c 19 Jun 2006 08:47:44 -0000 @@ -43,21 +43,21 @@ //#define TEST_SSE #define TEST_CMOV 0 #define TEST_FCOMI 0 #endif #if defined(__x86_64__) #define FMT64X "%016lx" #define FMTLX "%016lx" #define X86_64_ONLY(x) x #else -#define FMT64X "%016llx" +#define FMT64X "%016" PRIx64 #define FMTLX "%08lx" #define X86_64_ONLY(x) #endif #ifdef TEST_VM86 #include #endif #define xglue(x, y) x ## y #define glue(x, y) xglue(x, y)