On Nov 24 05:02, Philippe Mathieu-Daudé wrote:
> Per the PCI spec 3.0, in section 6.2.5.1, "Address Maps":
> 
>   A 32-bit register can be implemented to support a single
>   memory size that is a power of 2 from 16 bytes to 2 GB.
> 
> Add a check in nvme_init_pmr(), returning an error if the
> PMR region size is too small; and update the QTest.
> 
> Signed-off-by: Philippe Mathieu-Daudé <[email protected]>

Thanks Philippe!

Reviewed-by: Klaus Jensen <[email protected]>

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