Roy Smith wrote:
Adding to the confusion, many designs would use "active low" logic, which means a 1 was represented by a low voltage, and a 0 by a high voltage. So, you quickly end up with gibberish like, "not active low clear nand not active low enable clock".
There are ways of dealing with that in schematic diagrams. For exammple, if you have two active-low signals A and B and want to express "A is active or B is active", you draw an OR gate symbol with inversion circles on the inputs. That's equivalent to a NAND gate, but makes the intention clear. Schematics drawn that way are much easier to follow than ones that only use the inverted-output versions of the symbols. -- Greg -- https://mail.python.org/mailman/listinfo/python-list
