On Tue, Jan 20, 2009 at 6:29 PM, Paul Rubin <"http://phr.cx"@nospam.invalid> wrote: > "Rhodri James" <rho...@wildebst.demon.co.uk> writes: >> > What cpu's do you know of that can atomically increment and decrement >> > integers without locking? >> >> x86 (and pretty much any 8080 derivative, come to think of it). > > It would not have occurred to me that "lock inc" increments "without > locking". I understand that's different from a lock value sitting in > the data object but I thought that "lock-free algorithm" meant one > that didn't assert any of these hardware locks either. Maybe I'm > wrong.
Right... I was wondering about that. Well, any kind of memory access gets exclusive control of the bus except on NUMA, but I'm wondering how CMPXCHG http://en.wikipedia.org/wiki/Compare-and-swap compares to XADD performance wise. It seems to me that both of them must pull the old value across the bus, hang onto the bus, and move the new value in. Maybe since XADD needs to perform arithmetic there will be a few cycles lag between getting the old value and pushing the new value? Maybe CMPXCHG doesn't go through the ALU? If the bus isn't just sitting idle and you can immediately push out the new value then there's no real locking. Actually this article explicitly mentions CMPXCHG as lock free. http://en.wikipedia.org/wiki/Lock-free_and_wait-free_algorithms -- http://mail.python.org/mailman/listinfo/python-list
