On Fri, 17 Dec 2004 20:41:11 -0600, Mike Meyer <[EMAIL PROTECTED]> wrote:
>Scott Robinson <[EMAIL PROTECTED]> writes: > >> Forth seems better than basic, but is *weird* (I tried it for a >> while). I'm not sure going from Forth to C (or Python) would be much >> easier than Basic to C or Python. The biggest disappointment for >> Forth was that no significant Forth chips were made (and none until it >> was too late). A machine designed to be run on Forth would have been >> unbelievably powerful from the late 70s to the mid 90s (it would be >> more painful now than the x86 legacy, but still). > >I think you overestimate how long the Forth chip would have been a >serious competitor to x`the x86 line. LISP chips - which should have >all the same advantages - didn't last that long. > > <mike [My second followup, this one more technical] I can't speak for LISP, but the big difference I would make with an 80's 2-stack chip would be using a single register field. operand 1 = top of stack operand 2 is specified in the instruction (note that some are probably generic registers, others mapped to points on the stack). output is written to top of stack. This lets you get away with a single-ported register file. Once you have that, you can have a rich set of registers made out of DRAM (don't try this now, the processes are too different). Once you have the sensors and such for a DRAM array, you can use it for other things (instruction and stack buffers, MMU *especially the MMU*). This DRAM array takes the place of the microcode. Since you are using Forth, you are unlikely to expect to want a lot of complicated instructions. This gives you the best of both worlds, the raw speed of RISC (you won't put bizarre addressing modes into a Forth chip), with the "bridging the synaptic gap" that was the goal of CISC. This chip would have to figure in one of the following (all roughly the right time period) [IBM PC, Apple Mac, Commodore Amiga, Atari ST (the last two had reason to gamble big, they weren't going to make it any other way). I suppose I should have mentioned in the previous post that ARM didn't save the Achimedies (do I have my BBC machines right?). Such a chip would be a great advantage, but I have great faith in marketing to screw up great computers. Once the DRAM gets too slow, and gets replaced with SRAM, there still are plenty of benefits, but probably not enough to switch architectures. After that, it gets hard to pipeline, and tends to want explicit VLIW instead of superscaler, and superscaler always won that fight. This looks all rather depressing for such a chip, but that's roughly the position x86 was in until the Pentium Pro came out. At least such a Forth chip made sense at one point in its existence, that's something I can't say for x86. Scott Robinson -- http://mail.python.org/mailman/listinfo/python-list