I have never tried to use the lower level schematic components (ie mux, counter, gates, etc.) in an FPGA design. I _think_ you are supposed to be able to compile such a schematic representation and generate an fpga programming file. (however I have never used it in this way, and may be misinformed about it's abilities in this area...). I do not believe it can generate a VHDL description from a schematic representation. Except as you have described, as a higher level "entity outline" that you must fill in with the actual VHDL description.
The real advantage is the ability to take a VHDL description, and automagically (using the FPGA to PCB wizard) have it create the complete fpga's schematic sheet, label the schematic sheet with all of the net symbols (based on the VHDL entity description), add all of the off sheet ports required, wire up the fpga's pins/ports, and to manage any future I/O pin changes as the fpga (or PCB) development matures, and pass pin changes down to the PCB. ---Phil slbsc> We have DXP with all of the options except IP processors, including fpga slbsc> support, but no Nanoboard. My need is to build simple logic block slbsc> replacement fpgas, and insert them into pcb designs. The current fpga is slbsc> an Altera EPM3128A. slbsc> Made it through the schematic and pcb phases, including a schematic of the slbsc> fpga functions. slbsc> I was under the impression that at this point DXP would use the fpga slbsc> schematic to generate a VHDL file that I could compile with the appropriate slbsc> Altera software. When I go to Tools>Convert>Generate VHDL From Part, slbsc> andclick on thefpga symbol in the schematic, it generates a VHDL file with slbsc> only entries for the control signal pins. slbsc> My call to phone support ended with the explanation that the user is slbsc> supposed to fill in the details of the logic in this VHDL file and compile slbsc> it manually. slbsc> The examples in the manual (using the Nanoboard) certainly indicate that slbsc> there is some sort of automatic file and compilation going on. Am I slbsc> missing more than just the physical Nanoboard, like additional software? slbsc> If DXP won't generate the VHDL file from the fpga schematic, what is the slbsc> point of generating it in the first place? It seems that I could just slbsc> start with the Altera software. slbsc> Any help would be seriously appreciated. slbsc> Stan slbsc> L-Band Systems * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
