Switch devel/clang-tools-extra from 16 to 18. OK?

Index: Makefile
===================================================================
RCS file: /cvs/ports/devel/clang-tools-extra/Makefile,v
diff -u -p -r1.39 Makefile
--- Makefile    7 Aug 2024 20:56:29 -0000       1.39
+++ Makefile    11 Dec 2024 06:47:11 -0000
@@ -12,8 +12,7 @@ DPB_PROPERTIES =      parallel
 
 COMMENT=       Clang extra tools
 
-LLVM_V =       16.0.6
-LLVM_BASE =    llvm16
+LLVM_V =       18.1.8
 DISTNAME =     llvm-project-${LLVM_V}.src
 PKGNAME=       clang-tools-extra-${LLVM_V}
 
@@ -38,9 +37,9 @@ MODULES =             devel/cmake \
                        lang/clang \
                        lang/python
 
+MODCLANG_VERSION =             18
 MODCLANG_COMPILER_LINKS =      No
 MODCLANG_BUILDDEP =            No
-MODCLANG_RUNDEP =              No
 
 CONFIGURE_STYLE =      cmake
 
@@ -53,9 +52,6 @@ BUILD_DEPENDS +=      devel/swig \
                        textproc/py-sphinx${MODPY_FLAVOR} \
                        textproc/py-recommonmark${MODPY_FLAVOR}
 
-CLANG_INCLUDE_PATH =   ${LLVM_BASE}/lib/clang/16/include
-SUBST_VARS +=          CLANG_INCLUDE_PATH LLVM_V
-
 CONFIGURE_ARGS +=      -DLLVM_ENABLE_BACKTRACES=OFF \
                        -DLLVM_ENABLE_FFI=OFF \
                        -DLLVM_ENABLE_LIBXML2=OFF \
@@ -96,6 +92,9 @@ CXXFLAGS +=           ${CXXFLAGS-${MACHINE_ARCH}}
 # hack to disable the use of -Bsymbolic-functions
 OPENBSD_LD_IS_LLD =    FALSE
 SUBST_VARS +=          OPENBSD_LD_IS_LLD
+
+CLANG_INCLUDE_PATH =   
llvm${MODCLANG_VERSION}/lib/clang/${MODCLANG_VERSION}/include
+SUBST_VARS +=          CLANG_INCLUDE_PATH LLVM_V
 
 ALL_TARGET =   clang-change-namespace clang-apply-replacements
 ALL_TARGET +=  clang-doc clang-format clang-include-fixer clang-move
Index: _portcheck.pbh
===================================================================
RCS file: _portcheck.pbh
diff -N _portcheck.pbh
--- /dev/null   1 Jan 1970 00:00:00 -0000
+++ _portcheck.pbh      11 Dec 2024 06:47:11 -0000
@@ -0,0 +1,12 @@
+15 line(s) longer than 80 chars in Makefile
+hardcoded paths detected in Makefile, consider using SUBST_VARS and 
TRUEPREFIX/LOCALBASE/LOCALSTATEDIR/VARBASE
+LIB_DEPENDS devel/llvm/16 not needed for devel/clang-tools-extra ?
+LIB_DEPENDS devel/llvm/18 not needed for devel/clang-tools-extra ?
+LIB_DEPENDS devel/llvm/19 not needed for devel/clang-tools-extra ?
+Python module without compiled version, consider using ${MODPY_COMPILEALL}: 
share/clang/clang-format-diff.py
+Python module without compiled version, consider using ${MODPY_COMPILEALL}: 
share/clang/clang-format-sublime.py
+Python module without compiled version, consider using ${MODPY_COMPILEALL}: 
share/clang/clang-format.py
+Python module without compiled version, consider using ${MODPY_COMPILEALL}: 
share/clang/clang-include-fixer.py
+Python module without compiled version, consider using ${MODPY_COMPILEALL}: 
share/clang/clang-tidy-diff.py
+Python module without compiled version, consider using ${MODPY_COMPILEALL}: 
share/clang/run-find-all-symbols.py
+devel/clang-tools-extra
Index: distinfo
===================================================================
RCS file: /cvs/ports/devel/clang-tools-extra/distinfo,v
diff -u -p -r1.5 distinfo
--- distinfo    27 May 2024 18:14:08 -0000      1.5
+++ distinfo    11 Dec 2024 06:47:11 -0000
@@ -1,2 +1,2 @@
-SHA256 (llvm-project-16.0.6.src.tar.xz) = 
zl5xCB0Xzp6G18vPooxLBLkwD4+354Qisf62vFLDAo4=
-SIZE (llvm-project-16.0.6.src.tar.xz) = 118013488
+SHA256 (llvm-project-18.1.8.src.tar.xz) = 
C1hVem0yzu6XyNUzpZuSEth+D8TSgzkk62xhEkfbLyo=
+SIZE (llvm-project-18.1.8.src.tar.xz) = 132067260
Index: patches/patch-clang_docs_CommandGuide_clang_rst
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-clang_docs_CommandGuide_clang_rst,v
diff -u -p -r1.1 patch-clang_docs_CommandGuide_clang_rst
--- patches/patch-clang_docs_CommandGuide_clang_rst     27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-clang_docs_CommandGuide_clang_rst     11 Dec 2024 06:47:11 
-0000
@@ -9,7 +9,7 @@ Index: clang/docs/CommandGuide/clang.rst
  
  SYNOPSIS
  --------
-@@ -697,4 +697,4 @@ output of the compiler, along with information to repr
+@@ -737,4 +737,4 @@ output of the compiler, along with information to repr
  SEE ALSO
  --------
  
Index: patches/patch-clang_docs_conf_py
===================================================================
RCS file: patches/patch-clang_docs_conf_py
diff -N patches/patch-clang_docs_conf_py
--- /dev/null   1 Jan 1970 00:00:00 -0000
+++ patches/patch-clang_docs_conf_py    11 Dec 2024 06:47:11 -0000
@@ -0,0 +1,21 @@
+Index: clang/docs/conf.py
+--- clang/docs/conf.py.orig
++++ clang/docs/conf.py
+@@ -35,8 +35,16 @@ templates_path = ["_templates"]
+ 
+ import sphinx
+ 
+-if sphinx.version_info >= (3, 0):
++# When building man pages, we do not use the markdown pages,
++# So, we can continue without the myst_parser dependencies.
++# Doing so reduces dependencies of some packaged llvm distributions.
++try:
++    import myst_parser
++
+     extensions.append("myst_parser")
++except ImportError:
++    if not tags.has("builder-man"):
++        raise
+ 
+ # The encoding of source files.
+ # source_encoding = 'utf-8-sig'
Index: patches/patch-clang_include_clang_Basic_CodeGenOptions_def
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-clang_include_clang_Basic_CodeGenOptions_def,v
diff -u -p -r1.1 patch-clang_include_clang_Basic_CodeGenOptions_def
--- patches/patch-clang_include_clang_Basic_CodeGenOptions_def  27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-clang_include_clang_Basic_CodeGenOptions_def  11 Dec 2024 
06:47:11 -0000
@@ -1,13 +1,13 @@
 Index: clang/include/clang/Basic/CodeGenOptions.def
 --- clang/include/clang/Basic/CodeGenOptions.def.orig
 +++ clang/include/clang/Basic/CodeGenOptions.def
-@@ -385,6 +385,9 @@ VALUE_CODEGENOPT(SmallDataLimit, 32, 0)
+@@ -357,6 +357,9 @@ VALUE_CODEGENOPT(SmallDataLimit, 32, 0)
  /// The lower bound for a buffer to be considered for stack protection.
  VALUE_CODEGENOPT(SSPBufferSize, 32, 0)
  
 +/// Whether to use return protectors
 +CODEGENOPT(ReturnProtector, 1, 0)
 +
- /// The kind of generated debug info.
- ENUM_CODEGENOPT(DebugInfo, codegenoptions::DebugInfoKind, 4, 
codegenoptions::NoDebugInfo)
+ /// The kind of inlining to perform.
+ ENUM_CODEGENOPT(Inlining, InliningMethod, 2, NormalInlining)
  
Index: patches/patch-clang_include_clang_Basic_DiagnosticSemaKinds_td
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-clang_include_clang_Basic_DiagnosticSemaKinds_td,v
diff -u -p -r1.1 patch-clang_include_clang_Basic_DiagnosticSemaKinds_td
--- patches/patch-clang_include_clang_Basic_DiagnosticSemaKinds_td      27 May 
2024 18:14:08 -0000      1.1
+++ patches/patch-clang_include_clang_Basic_DiagnosticSemaKinds_td      11 Dec 
2024 06:47:11 -0000
@@ -1,7 +1,7 @@
 Index: clang/include/clang/Basic/DiagnosticSemaKinds.td
 --- clang/include/clang/Basic/DiagnosticSemaKinds.td.orig
 +++ clang/include/clang/Basic/DiagnosticSemaKinds.td
-@@ -251,7 +251,7 @@ def warn_deprecated_register : Warning<
+@@ -277,7 +277,7 @@ def warn_deprecated_register : Warning<
    "and incompatible with C++17">, InGroup<DeprecatedRegister>;
  def ext_register_storage_class : ExtWarn<
    "ISO C++17 does not allow 'register' storage class specifier">,
@@ -10,7 +10,7 @@ Index: clang/include/clang/Basic/Diagnos
  
  def err_invalid_decl_spec_combination : Error<
    "cannot combine with previous '%0' declaration specifier">;
-@@ -419,7 +419,7 @@ def warn_implicit_function_decl : Warning<
+@@ -452,7 +452,7 @@ def warn_implicit_function_decl : Warning<
    InGroup<ImplicitFunctionDeclare>, DefaultIgnore;
  def ext_implicit_function_decl_c99 : ExtWarn<
    "call to undeclared function %0; ISO C99 and later do not support implicit "
@@ -19,7 +19,7 @@ Index: clang/include/clang/Basic/Diagnos
  def note_function_suggestion : Note<"did you mean %0?">;
  
  def err_ellipsis_first_param : Error<
-@@ -709,7 +709,7 @@ def ext_implicit_lib_function_decl : ExtWarn<
+@@ -746,7 +746,7 @@ def ext_implicit_lib_function_decl : ExtWarn<
  def ext_implicit_lib_function_decl_c99 : ExtWarn<
    "call to undeclared library function '%0' with type %1; ISO C99 and later "
    "do not support implicit function declarations">,
@@ -28,7 +28,7 @@ Index: clang/include/clang/Basic/Diagnos
  def note_include_header_or_declare : Note<
    "include the header <%0> or explicitly provide a declaration for '%1'">;
  def note_previous_builtin_declaration : Note<"%0 is a builtin with type %1">;
-@@ -4391,7 +4391,7 @@ def err_ident_list_in_fn_declaration : Error<
+@@ -4567,7 +4567,7 @@ def err_ident_list_in_fn_declaration : Error<
    "a parameter list without types is only allowed in a function definition">;
  def ext_param_not_declared : ExtWarn<
    "parameter %0 was not declared, defaults to 'int'; ISO C99 and later do not 
"
@@ -37,7 +37,7 @@ Index: clang/include/clang/Basic/Diagnos
  def err_param_default_argument : Error<
    "C does not support default arguments">;
  def err_param_default_argument_redefinition : Error<
-@@ -6980,7 +6980,7 @@ def warn_pointer_indirection_from_incompatible_type : 
+@@ -7197,7 +7197,7 @@ def warn_pointer_indirection_from_incompatible_type : 
    InGroup<UndefinedReinterpretCast>, DefaultIgnore;
  def warn_taking_address_of_packed_member : Warning<
    "taking address of packed member %0 of class or structure %q1 may result in 
an unaligned pointer value">,
@@ -46,7 +46,7 @@ Index: clang/include/clang/Basic/Diagnos
  def warn_param_mismatched_alignment : Warning<
    "passing %0-byte aligned argument to %1-byte aligned parameter %2%select{| 
of %4}3 may result in an unaligned pointer access">,
    InGroup<DiagGroup<"align-mismatch">>;
-@@ -8113,7 +8113,7 @@ def err_typecheck_convert_pointer_int : Error<
+@@ -8365,7 +8365,7 @@ def err_typecheck_convert_pointer_int : Error<
    "; remove &}3">;
  def ext_typecheck_convert_pointer_int : ExtWarn<
    err_typecheck_convert_pointer_int.Summary>,
@@ -55,7 +55,7 @@ Index: clang/include/clang/Basic/Diagnos
  def err_typecheck_convert_int_pointer : Error<
    "incompatible integer to pointer conversion "
    "%select{%diff{assigning to $ from $|assigning to different types}0,1"
-@@ -8133,7 +8133,7 @@ def err_typecheck_convert_int_pointer : Error<
+@@ -8385,7 +8385,7 @@ def err_typecheck_convert_int_pointer : Error<
    "; remove &}3">;
  def ext_typecheck_convert_int_pointer : ExtWarn<
    err_typecheck_convert_int_pointer.Summary>,
@@ -64,7 +64,7 @@ Index: clang/include/clang/Basic/Diagnos
  def ext_typecheck_convert_pointer_void_func : Extension<
    "%select{%diff{assigning to $ from $|assigning to different types}0,1"
    "|%diff{passing $ to parameter of type $|"
-@@ -8174,7 +8174,7 @@ def ext_typecheck_convert_incompatible_pointer_sign : 
+@@ -8426,7 +8426,7 @@ def ext_typecheck_convert_incompatible_pointer_sign : 
    "|%diff{casting $ to type $|casting between types}0,1}2"
    " converts between pointers to integer types %select{with different sign|"
    "where one is of the unique plain 'char' type and the other is not}3">,
@@ -73,7 +73,7 @@ Index: clang/include/clang/Basic/Diagnos
  def err_typecheck_convert_incompatible_pointer_sign :
    Error<ext_typecheck_convert_incompatible_pointer_sign.Summary>;
  def ext_typecheck_convert_incompatible_pointer : ExtWarn<
-@@ -8231,7 +8231,7 @@ def err_typecheck_convert_incompatible_function_pointe
+@@ -8483,7 +8483,7 @@ def err_typecheck_convert_incompatible_function_pointe
    "; remove &}3">;
  def ext_typecheck_convert_incompatible_function_pointer : ExtWarn<
    err_typecheck_convert_incompatible_function_pointer.Summary>,
@@ -82,7 +82,7 @@ Index: clang/include/clang/Basic/Diagnos
  def warn_typecheck_convert_incompatible_function_pointer_strict : Warning<
    err_typecheck_convert_incompatible_function_pointer.Summary>,
    InGroup<DiagGroup<"incompatible-function-pointer-types-strict">>, 
DefaultIgnore;
-@@ -9769,6 +9769,9 @@ def err_os_log_argument_too_big : Error<
+@@ -10065,6 +10065,9 @@ def err_os_log_argument_too_big : Error<
  def warn_os_log_format_narg : Error<
   "os_log() '%%n' format specifier is not allowed">, DefaultError;
  
@@ -92,7 +92,7 @@ Index: clang/include/clang/Basic/Diagnos
  // Statements.
  def err_continue_not_in_loop : Error<
    "'continue' statement not in loop statement">;
-@@ -10105,7 +10108,7 @@ def warn_receiver_forward_class : Warning<
+@@ -10407,7 +10410,7 @@ def warn_receiver_forward_class : Warning<
  def note_method_sent_forward_class : Note<"method %0 is used for the forward 
class">;
  def ext_missing_type_specifier : ExtWarn<
    "type specifier missing, defaults to 'int'; ISO C99 and later do not 
support "
Index: patches/patch-clang_include_clang_Driver_Options_td
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-clang_include_clang_Driver_Options_td,v
diff -u -p -r1.1 patch-clang_include_clang_Driver_Options_td
--- patches/patch-clang_include_clang_Driver_Options_td 27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-clang_include_clang_Driver_Options_td 11 Dec 2024 06:47:11 
-0000
@@ -1,42 +1,53 @@
 Index: clang/include/clang/Driver/Options.td
 --- clang/include/clang/Driver/Options.td.orig
 +++ clang/include/clang/Driver/Options.td
-@@ -2847,6 +2847,16 @@ def ftrivial_auto_var_init : Joined<["-"], "ftrivial-a
+@@ -3672,6 +3672,20 @@ def ftrivial_auto_var_init : Joined<["-"], "ftrivial-a
    NormalizedValuesScope<"LangOptions::TrivialAutoVarInitKind">,
    NormalizedValues<["Uninitialized", "Zero", "Pattern"]>,
    MarshallingInfoEnum<LangOpts<"TrivialAutoVarInit">, "Uninitialized">;
-+def ret_protector : Flag<["-"], "ret-protector">, Flags<[CC1Option]>,
++def ret_protector : Flag<["-"], "ret-protector">, Visibility<[CC1Option]>,
 +  HelpText<"Enable Return Protectors">;
-+def fno_ret_protector : Flag<["-"], "fno-ret-protector">, Group<f_Group>, 
Flags<[CoreOption]>,
++def fno_ret_protector : Flag<["-"], "fno-ret-protector">, Group<f_Group>, 
Visibility<[ClangOption, CLOption, DXCOption]>,
 +  HelpText<"Disable return protector">;
-+def fret_protector : Flag<["-"], "fret-protector">, Group<f_Group>, 
Flags<[CoreOption]>,
++def fret_protector : Flag<["-"], "fret-protector">, Group<f_Group>, 
Visibility<[ClangOption, CLOption, DXCOption]>,
 +  HelpText<"Enable return protector">;
-+def fno_fixup_gadgets : Flag<["-"], "fno-fixup-gadgets">, Group<f_Group>, 
Flags<[CoreOption]>,
++def fno_fixup_gadgets : Flag<["-"], "fno-fixup-gadgets">, Group<f_Group>, 
Visibility<[ClangOption, CLOption, DXCOption]>,
 +  HelpText<"Disable FixupGadgets pass (x86 only)">;
-+def ffixup_gadgets : Flag<["-"], "ffixup-gadgets">, Group<f_Group>, 
Flags<[CoreOption]>,
++def ffixup_gadgets : Flag<["-"], "ffixup-gadgets">, Group<f_Group>, 
Visibility<[ClangOption, CLOption, DXCOption]>,
 +  HelpText<"Replace ROP friendly instructions with safe alternatives (x86 
only)">;
++def fno_ret_clean : Flag<["-"], "fno-ret-clean">, Group<f_Group>, 
Visibility<[ClangOption, CLOption, DXCOption]>,
++  HelpText<"Disable ret-clean pass">;
++def fret_clean : Flag<["-"], "fret-clean">, Group<f_Group>, 
Visibility<[ClangOption, CLOption, DXCOption]>,
++  HelpText<"Clean return address from stack after call">;
  def ftrivial_auto_var_init_stop_after : Joined<["-"], 
"ftrivial-auto-var-init-stop-after=">, Group<f_Group>,
-   Flags<[CC1Option, CoreOption]>, HelpText<"Stop initializing trivial 
automatic stack variables after the specified number of instances">,
-   MarshallingInfoInt<LangOpts<"TrivialAutoVarInitStopAfter">>;
-@@ -3943,6 +3953,8 @@ def mno_check_zero_division : Flag<["-"], "mno-check-z
+   Visibility<[ClangOption, CC1Option, CLOption, DXCOption]>,
+   HelpText<"Stop initializing trivial automatic stack variables after the 
specified number of instances">,
+@@ -5061,6 +5075,8 @@ def mno_check_zero_division : Flag<["-"], "mno-check-z
  def mfix4300 : Flag<["-"], "mfix4300">, Group<m_mips_Features_Group>;
  def mcompact_branches_EQ : Joined<["-"], "mcompact-branches=">,
                             Group<m_mips_Features_Group>;
 +def mfix_loongson2f_btb : Flag<["-"], "mfix-loongson2f-btb">,
 +                          Group<m_mips_Features_Group>;
+ } // let Flags = [TargetSpecific]
  def mbranch_likely : Flag<["-"], "mbranch-likely">, Group<m_Group>,
    IgnoredGCCCompat;
- def mno_branch_likely : Flag<["-"], "mno-branch-likely">, Group<m_Group>,
-@@ -4184,7 +4196,7 @@ defm pthread : BoolOption<"", "pthread",
-   LangOpts<"POSIXThreads">, DefaultFalse,
-   PosFlag<SetTrue, [], "Support POSIX threads in generated code">,
-   NegFlag<SetFalse>, BothFlags<[CC1Option]>>;
--def p : Flag<["-"], "p">;
+@@ -5276,10 +5292,14 @@ def pedantic_errors : Flag<["-", "--"], "pedantic-erro
+ def pedantic : Flag<["-", "--"], "pedantic">, Group<pedantic_Group>,
+   Visibility<[ClangOption, CC1Option, FlangOption, FC1Option]>,
+   HelpText<"Warn on language extensions">, 
MarshallingInfoFlag<DiagnosticOpts<"Pedantic">>;
+-def p : Flag<["-"], "p">, HelpText<"Enable mcount instrumentation with prof">;
++// def p : Flag<["-"], "p">, HelpText<"Enable mcount instrumentation with 
prof">;
++// Commit 7f85c560b43bd1b2ebf77cc443281b474b5e19c6 re-added -p as another
++// option, referencing AIX. We deliberately added -p as an alias of -pg 
(below)
++// in 4a39d3fe14b39d088ca94a7747e4bab1dac261b1 and will keep it that way for 
now.
+ def pg : Flag<["-"], "pg">, HelpText<"Enable mcount instrumentation">,
+   Visibility<[ClangOption, CC1Option]>,
+   MarshallingInfoFlag<CodeGenOpts<"InstrumentForProfiling">>;
 +def p : Flag<["-"], "p">, Alias<pg>;
- def pie : Flag<["-"], "pie">, Group<Link_Group>;
- def static_pie : Flag<["-"], "static-pie">, Group<Link_Group>;
- def read__only__relocs : Separate<["-"], "read_only_relocs">;
-@@ -4796,6 +4808,8 @@ def mshstk : Flag<["-"], "mshstk">, Group<m_x86_Featur
+ def pipe : Flag<["-", "--"], "pipe">,
+   HelpText<"Use pipes between commands, when possible">;
+ def prebind__all__twolevel__modules : Flag<["-"], 
"prebind_all_twolevel_modules">;
+@@ -6076,6 +6096,8 @@ def mshstk : Flag<["-"], "mshstk">, Group<m_x86_Featur
  def mno_shstk : Flag<["-"], "mno-shstk">, Group<m_x86_Features_Group>;
  def mretpoline_external_thunk : Flag<["-"], "mretpoline-external-thunk">, 
Group<m_x86_Features_Group>;
  def mno_retpoline_external_thunk : Flag<["-"], 
"mno-retpoline-external-thunk">, Group<m_x86_Features_Group>;
@@ -44,4 +55,4 @@ Index: clang/include/clang/Driver/Option
 +def mno_save_args : Flag<["-"], "mno-save-args">, Group<m_x86_Features_Group>;
  def mvzeroupper : Flag<["-"], "mvzeroupper">, Group<m_x86_Features_Group>;
  def mno_vzeroupper : Flag<["-"], "mno-vzeroupper">, 
Group<m_x86_Features_Group>;
- 
+ def mno_gather : Flag<["-"], "mno-gather">, Group<m_Group>,
Index: patches/patch-clang_include_clang_Sema_Sema_h
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-clang_include_clang_Sema_Sema_h,v
diff -u -p -r1.1 patch-clang_include_clang_Sema_Sema_h
--- patches/patch-clang_include_clang_Sema_Sema_h       27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-clang_include_clang_Sema_Sema_h       11 Dec 2024 06:47:11 
-0000
@@ -1,7 +1,7 @@
 Index: clang/include/clang/Sema/Sema.h
 --- clang/include/clang/Sema/Sema.h.orig
 +++ clang/include/clang/Sema/Sema.h
-@@ -13567,6 +13567,7 @@ class Sema final { (public)
+@@ -14019,6 +14019,7 @@ class Sema final { (public)
      FST_FreeBSDKPrintf,
      FST_OSTrace,
      FST_OSLog,
Index: patches/patch-clang_lib_AST_FormatString_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-clang_lib_AST_FormatString_cpp,v
diff -u -p -r1.1 patch-clang_lib_AST_FormatString_cpp
--- patches/patch-clang_lib_AST_FormatString_cpp        27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-clang_lib_AST_FormatString_cpp        11 Dec 2024 06:47:11 
-0000
@@ -1,7 +1,7 @@
 Index: clang/lib/AST/FormatString.cpp
 --- clang/lib/AST/FormatString.cpp.orig
 +++ clang/lib/AST/FormatString.cpp
-@@ -828,6 +828,10 @@ bool FormatSpecifier::hasValidLengthModifier(const Tar
+@@ -858,6 +858,10 @@ bool FormatSpecifier::hasValidLengthModifier(const Tar
          case ConversionSpecifier::XArg:
          case ConversionSpecifier::nArg:
            return true;
@@ -12,7 +12,7 @@ Index: clang/lib/AST/FormatString.cpp
          case ConversionSpecifier::FreeBSDrArg:
          case ConversionSpecifier::FreeBSDyArg:
            return Target.getTriple().isOSFreeBSD() || 
Target.getTriple().isPS();
-@@ -863,6 +867,10 @@ bool FormatSpecifier::hasValidLengthModifier(const Tar
+@@ -895,6 +899,10 @@ bool FormatSpecifier::hasValidLengthModifier(const Tar
          case ConversionSpecifier::ScanListArg:
          case ConversionSpecifier::ZArg:
            return true;
@@ -23,7 +23,7 @@ Index: clang/lib/AST/FormatString.cpp
          case ConversionSpecifier::FreeBSDrArg:
          case ConversionSpecifier::FreeBSDyArg:
            return Target.getTriple().isOSFreeBSD() || 
Target.getTriple().isPS();
-@@ -1024,6 +1032,7 @@ bool FormatSpecifier::hasStandardLengthConversionCombi
+@@ -1056,6 +1064,7 @@ bool FormatSpecifier::hasStandardLengthConversionCombi
          case ConversionSpecifier::uArg:
          case ConversionSpecifier::xArg:
          case ConversionSpecifier::XArg:
Index: patches/patch-clang_lib_Basic_Targets_Mips_h
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-clang_lib_Basic_Targets_Mips_h,v
diff -u -p -r1.1 patch-clang_lib_Basic_Targets_Mips_h
--- patches/patch-clang_lib_Basic_Targets_Mips_h        27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-clang_lib_Basic_Targets_Mips_h        11 Dec 2024 06:47:11 
-0000
@@ -2,8 +2,8 @@ Index: clang/lib/Basic/Targets/Mips.h
 --- clang/lib/Basic/Targets/Mips.h.orig
 +++ clang/lib/Basic/Targets/Mips.h
 @@ -238,6 +238,7 @@ class LLVM_LIBRARY_VISIBILITY MipsTargetInfo : public 
+     case 'd': // Equivalent to "r" unless generating MIPS16 code.
      case 'y': // Equivalent to "r", backward compatibility only.
-     case 'f': // floating-point registers.
      case 'c': // $25 for indirect jumps
 +    case 'h': // hi register
      case 'l': // lo register
Index: patches/patch-clang_lib_Basic_Targets_X86_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-clang_lib_Basic_Targets_X86_cpp,v
diff -u -p -r1.1 patch-clang_lib_Basic_Targets_X86_cpp
--- patches/patch-clang_lib_Basic_Targets_X86_cpp       27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-clang_lib_Basic_Targets_X86_cpp       11 Dec 2024 06:47:11 
-0000
@@ -1,7 +1,7 @@
 Index: clang/lib/Basic/Targets/X86.cpp
 --- clang/lib/Basic/Targets/X86.cpp.orig
 +++ clang/lib/Basic/Targets/X86.cpp
-@@ -323,6 +323,8 @@ bool X86TargetInfo::handleTargetFeatures(std::vector<s
+@@ -389,6 +389,8 @@ bool X86TargetInfo::handleTargetFeatures(std::vector<s
        HasPTWRITE = true;
      } else if (Feature == "+invpcid") {
        HasINVPCID = true;
@@ -10,7 +10,7 @@ Index: clang/lib/Basic/Targets/X86.cpp
      } else if (Feature == "+enqcmd") {
        HasENQCMD = true;
      } else if (Feature == "+hreset") {
-@@ -1070,6 +1072,7 @@ bool X86TargetInfo::hasFeature(StringRef Feature) cons
+@@ -1222,6 +1224,7 @@ bool X86TargetInfo::hasFeature(StringRef Feature) cons
        .Case("movbe", HasMOVBE)
        .Case("movdiri", HasMOVDIRI)
        .Case("movdir64b", HasMOVDIR64B)
Index: patches/patch-clang_lib_Basic_Targets_X86_h
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-clang_lib_Basic_Targets_X86_h,v
diff -u -p -r1.1 patch-clang_lib_Basic_Targets_X86_h
--- patches/patch-clang_lib_Basic_Targets_X86_h 27 May 2024 18:14:08 -0000      
1.1
+++ patches/patch-clang_lib_Basic_Targets_X86_h 11 Dec 2024 06:47:11 -0000
@@ -1,11 +1,11 @@
 Index: clang/lib/Basic/Targets/X86.h
 --- clang/lib/Basic/Targets/X86.h.orig
 +++ clang/lib/Basic/Targets/X86.h
-@@ -138,6 +138,7 @@ class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public T
+@@ -147,6 +147,7 @@ class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public T
    bool HasMOVDIR64B = false;
    bool HasPTWRITE = false;
    bool HasINVPCID = false;
 +  bool HasSaveArgs = false;
    bool HasENQCMD = false;
+   bool HasAVXVNNIINT16 = false;
    bool HasAMXFP16 = false;
-   bool HasCMPCCXADD = false;
Index: patches/patch-clang_lib_CodeGen_CGCall_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-clang_lib_CodeGen_CGCall_cpp,v
diff -u -p -r1.1 patch-clang_lib_CodeGen_CGCall_cpp
--- patches/patch-clang_lib_CodeGen_CGCall_cpp  27 May 2024 18:14:08 -0000      
1.1
+++ patches/patch-clang_lib_CodeGen_CGCall_cpp  11 Dec 2024 06:47:11 -0000
@@ -1,7 +1,7 @@
 Index: clang/lib/CodeGen/CGCall.cpp
 --- clang/lib/CodeGen/CGCall.cpp.orig
 +++ clang/lib/CodeGen/CGCall.cpp
-@@ -2347,6 +2347,9 @@ void CodeGenModule::ConstructAttributeList(StringRef N
+@@ -2556,6 +2556,9 @@ void CodeGenModule::ConstructAttributeList(StringRef N
      // CPU/feature overrides.  addDefaultFunctionDefinitionAttributes
      // handles these separately to set them based on the global defaults.
      GetCPUAndFeaturesAttributes(CalleeInfo.getCalleeDecl(), FuncAttrs);
Index: patches/patch-clang_lib_CodeGen_CodeGenModule_cpp
===================================================================
RCS file: patches/patch-clang_lib_CodeGen_CodeGenModule_cpp
diff -N patches/patch-clang_lib_CodeGen_CodeGenModule_cpp
--- patches/patch-clang_lib_CodeGen_CodeGenModule_cpp   27 May 2024 18:14:08 
-0000      1.1
+++ /dev/null   1 Jan 1970 00:00:00 -0000
@@ -1,12 +0,0 @@
-Index: clang/lib/CodeGen/CodeGenModule.cpp
---- clang/lib/CodeGen/CodeGenModule.cpp.orig
-+++ clang/lib/CodeGen/CodeGenModule.cpp
-@@ -979,7 +979,7 @@ void CodeGenModule::EmitOpenCLMetadata() {
- void CodeGenModule::EmitBackendOptionsMetadata(
-     const CodeGenOptions CodeGenOpts) {
-   if (getTriple().isRISCV()) {
--    getModule().addModuleFlag(llvm::Module::Error, "SmallDataLimit",
-+    getModule().addModuleFlag(llvm::Module::Warning, "SmallDataLimit",
-                               CodeGenOpts.SmallDataLimit);
-   }
- }
Index: patches/patch-clang_lib_Driver_Driver_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-clang_lib_Driver_Driver_cpp,v
diff -u -p -r1.1 patch-clang_lib_Driver_Driver_cpp
--- patches/patch-clang_lib_Driver_Driver_cpp   27 May 2024 18:14:08 -0000      
1.1
+++ patches/patch-clang_lib_Driver_Driver_cpp   11 Dec 2024 06:47:11 -0000
@@ -1,13 +1,13 @@
 Index: clang/lib/Driver/Driver.cpp
 --- clang/lib/Driver/Driver.cpp.orig
 +++ clang/lib/Driver/Driver.cpp
-@@ -5826,7 +5826,50 @@ const char *Driver::GetNamedOutputPath(Compilation &C,
+@@ -6064,7 +6064,50 @@ const char *Driver::GetNamedOutputPath(Compilation &C,
    return C.addResultFile(NamedOutput, &JA);
  }
  
 +
 +namespace {
-+static Optional<std::string> findFile(StringRef path1, const Twine &path2) {
++static std::optional<std::string> findFile(StringRef path1, const Twine 
&path2) {
 +  SmallString<128> s;
 +  llvm::sys::path::append(s, path1, path2);
 +
@@ -17,7 +17,7 @@ Index: clang/lib/Driver/Driver.cpp
 +}
 +
 +// Must be in sync with findMajMinShlib in lld/ELF/DriverUtils.cpp.
-+llvm::Optional<std::string> findMajMinShlib(StringRef dir, const Twine& 
libNameSo) {
++std::optional<std::string> findMajMinShlib(StringRef dir, const Twine& 
libNameSo) {
 +  // Handle OpenBSD-style maj/min shlib scheme
 +  llvm::SmallString<128> Scratch;
 +  const StringRef LibName = (libNameSo + ".").toStringRef(Scratch);
@@ -27,7 +27,7 @@ Index: clang/lib/Driver/Driver.cpp
 +       LI != LE; LI = LI.increment(EC)) {
 +    StringRef FilePath = LI->path();
 +    StringRef FileName = llvm::sys::path::filename(FilePath);
-+    if (!(FileName.startswith(LibName)))
++    if (!(FileName.starts_with(LibName)))
 +      continue;
 +    std::pair<StringRef, StringRef> MajMin =
 +      FileName.substr(LibName.size()).split('.');
@@ -48,11 +48,11 @@ Index: clang/lib/Driver/Driver.cpp
 +}  // namespace
 +
  std::string Driver::GetFilePath(StringRef Name, const ToolChain &TC) const {
-+  const bool lookForLibDotSo = Name.startswith("lib") && Name.endswith(".so");
++  const bool lookForLibDotSo = Name.starts_with("lib") && 
Name.ends_with(".so");
    // Search for Name in a list of paths.
    auto SearchPaths = [&](const llvm::SmallVectorImpl<std::string> &P)
        -> std::optional<std::string> {
-@@ -5836,9 +5879,14 @@ std::string Driver::GetFilePath(StringRef Name, const 
+@@ -6074,9 +6117,14 @@ std::string Driver::GetFilePath(StringRef Name, const 
        if (Dir.empty())
          continue;
        SmallString<128> P(Dir[0] == '=' ? SysRoot + Dir.substr(1) : Dir);
Index: patches/patch-clang_lib_Driver_ToolChains_Arch_RISCV_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-clang_lib_Driver_ToolChains_Arch_RISCV_cpp,v
diff -u -p -r1.1 patch-clang_lib_Driver_ToolChains_Arch_RISCV_cpp
--- patches/patch-clang_lib_Driver_ToolChains_Arch_RISCV_cpp    27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-clang_lib_Driver_ToolChains_Arch_RISCV_cpp    11 Dec 2024 
06:47:11 -0000
@@ -1,7 +1,7 @@
 Index: clang/lib/Driver/ToolChains/Arch/RISCV.cpp
 --- clang/lib/Driver/ToolChains/Arch/RISCV.cpp.orig
 +++ clang/lib/Driver/ToolChains/Arch/RISCV.cpp
-@@ -140,6 +140,13 @@ void riscv::getRISCVTargetFeatures(const Driver &D, co
+@@ -154,6 +154,13 @@ void riscv::getRISCVTargetFeatures(const Driver &D, co
    if (Args.hasArg(options::OPT_ffixed_x31))
      Features.push_back("+reserve-x31");
  
@@ -15,11 +15,11 @@ Index: clang/lib/Driver/ToolChains/Arch/
    // -mrelax is default, unless -mno-relax is specified.
    if (Args.hasFlag(options::OPT_mrelax, options::OPT_mno_relax, true)) {
      Features.push_back("+relax");
-@@ -152,6 +159,7 @@ void riscv::getRISCVTargetFeatures(const Driver &D, co
+@@ -166,6 +173,7 @@ void riscv::getRISCVTargetFeatures(const Driver &D, co
    } else {
      Features.push_back("-relax");
    }
 +#endif
  
-   // GCC Compatibility: -mno-save-restore is default, unless -msave-restore is
-   // specified.
+   // -mno-unaligned-access is default, unless -munaligned-access is specified.
+   AddTargetFeature(Args, Features, options::OPT_munaligned_access,
Index: patches/patch-clang_lib_Driver_ToolChains_Clang_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-clang_lib_Driver_ToolChains_Clang_cpp,v
diff -u -p -r1.1 patch-clang_lib_Driver_ToolChains_Clang_cpp
--- patches/patch-clang_lib_Driver_ToolChains_Clang_cpp 27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-clang_lib_Driver_ToolChains_Clang_cpp 11 Dec 2024 06:47:11 
-0000
@@ -1,7 +1,7 @@
 Index: clang/lib/Driver/ToolChains/Clang.cpp
 --- clang/lib/Driver/ToolChains/Clang.cpp.orig
 +++ clang/lib/Driver/ToolChains/Clang.cpp
-@@ -1566,15 +1566,21 @@ void AddUnalignedAccessWarning(ArgStringList &CmdArgs)
+@@ -1506,15 +1506,21 @@ void AddUnalignedAccessWarning(ArgStringList &CmdArgs)
  
  static void CollectARMPACBTIOptions(const ToolChain &TC, const ArgList &Args,
                                      ArgStringList &CmdArgs, bool isAArch64) {
@@ -25,7 +25,7 @@ Index: clang/lib/Driver/ToolChains/Clang
    if (!(isAArch64 || (Triple.isArmT32() && Triple.isArmMClass())))
      D.Diag(diag::warn_incompatible_branch_protection_option)
          << Triple.getArchName();
-@@ -1588,7 +1594,10 @@ static void CollectARMPACBTIOptions(const ToolChain &T
+@@ -1528,7 +1534,10 @@ static void CollectARMPACBTIOptions(const ToolChain &T
        D.Diag(diag::err_drv_unsupported_option_argument)
            << A->getSpelling() << Scope;
      Key = "a_key";
@@ -34,10 +34,10 @@ Index: clang/lib/Driver/ToolChains/Clang
 +      IndirectBranches = true;
 +    else
 +      IndirectBranches = false;
+     BranchProtectionPAuthLR = false;
+     GuardedControlStack = false;
    } else {
-     StringRef DiagMsg;
-     llvm::ARM::ParsedBranchProtection PBP;
-@@ -2536,6 +2545,11 @@ static void CollectArgsForIntegratedAssembler(Compilat
+@@ -2567,6 +2576,11 @@ static void CollectArgsForIntegratedAssembler(Compilat
            CmdArgs.push_back("-soft-float");
            continue;
          }
@@ -49,7 +49,7 @@ Index: clang/lib/Driver/ToolChains/Clang
  
          MipsTargetFeature = llvm::StringSwitch<const char *>(Value)
                                  .Case("-mips1", "+mips1")
-@@ -5289,9 +5303,12 @@ void Clang::ConstructJob(Compilation &C, const JobActi
+@@ -5539,9 +5553,12 @@ void Clang::ConstructJob(Compilation &C, const JobActi
        OFastEnabled ? options::OPT_Ofast : options::OPT_fstrict_aliasing;
    // We turn strict aliasing off by default if we're in CL mode, since MSVC
    // doesn't do any TBAA.
@@ -64,7 +64,7 @@ Index: clang/lib/Driver/ToolChains/Clang
      CmdArgs.push_back("-relaxed-aliasing");
    if (!Args.hasFlag(options::OPT_fstruct_path_tbaa,
                      options::OPT_fno_struct_path_tbaa, true))
-@@ -6321,7 +6338,8 @@ void Clang::ConstructJob(Compilation &C, const JobActi
+@@ -6626,7 +6643,8 @@ void Clang::ConstructJob(Compilation &C, const JobActi
                                        options::OPT_fno_strict_overflow)) {
      if (A->getOption().matches(options::OPT_fno_strict_overflow))
        CmdArgs.push_back("-fwrapv");
@@ -74,7 +74,7 @@ Index: clang/lib/Driver/ToolChains/Clang
  
    if (Arg *A = Args.getLastArg(options::OPT_freroll_loops,
                                 options::OPT_fno_reroll_loops))
-@@ -6342,7 +6360,48 @@ void Clang::ConstructJob(Compilation &C, const JobActi
+@@ -6647,7 +6665,58 @@ void Clang::ConstructJob(Compilation &C, const JobActi
    Args.addOptInFlag(CmdArgs, options::OPT_mspeculative_load_hardening,
                      options::OPT_mno_speculative_load_hardening);
  
@@ -121,10 +121,20 @@ Index: clang/lib/Driver/ToolChains/Clang
 +      CmdArgs.push_back(Args.MakeArgString(Twine("-x86-fixup-gadgets=true")));
 +  }
 +
++  // -ret-clean
++  if (Arg *A = Args.getLastArg(options::OPT_fno_ret_clean,
++                               options::OPT_fret_clean)) {
++    CmdArgs.push_back(Args.MakeArgString(Twine("-mllvm")));
++    if (A->getOption().matches(options::OPT_fno_ret_clean))
++      CmdArgs.push_back(Args.MakeArgString(Twine("-x86-ret-clean=false")));
++    else if (A->getOption().matches(options::OPT_fret_clean))
++      CmdArgs.push_back(Args.MakeArgString(Twine("-x86-ret-clean=true")));
++  }
++
    RenderSCPOptions(TC, Args, CmdArgs);
    RenderTrivialAutoVarInitOptions(D, TC, Args, CmdArgs);
  
-@@ -6417,6 +6476,11 @@ void Clang::ConstructJob(Compilation &C, const JobActi
+@@ -6725,6 +6794,11 @@ void Clang::ConstructJob(Compilation &C, const JobActi
    if (Arg *A = Args.getLastArg(options::OPT_fcf_protection_EQ)) {
      CmdArgs.push_back(
          Args.MakeArgString(Twine("-fcf-protection=") + A->getValue()));
@@ -136,7 +146,7 @@ Index: clang/lib/Driver/ToolChains/Clang
    }
  
    if (Arg *A = Args.getLastArg(options::OPT_mfunction_return_EQ))
-@@ -6895,6 +6959,18 @@ void Clang::ConstructJob(Compilation &C, const JobActi
+@@ -7236,6 +7310,18 @@ void Clang::ConstructJob(Compilation &C, const JobActi
                                       options::OPT_fno_rewrite_imports, false);
    if (RewriteImports)
      CmdArgs.push_back("-frewrite-imports");
Index: patches/patch-clang_lib_Driver_ToolChains_OpenBSD_cpp
===================================================================
RCS file: patches/patch-clang_lib_Driver_ToolChains_OpenBSD_cpp
diff -N patches/patch-clang_lib_Driver_ToolChains_OpenBSD_cpp
--- patches/patch-clang_lib_Driver_ToolChains_OpenBSD_cpp       27 May 2024 
18:14:08 -0000      1.1
+++ /dev/null   1 Jan 1970 00:00:00 -0000
@@ -1,14 +0,0 @@
-Index: clang/lib/Driver/ToolChains/OpenBSD.cpp
---- clang/lib/Driver/ToolChains/OpenBSD.cpp.orig
-+++ clang/lib/Driver/ToolChains/OpenBSD.cpp
-@@ -276,6 +276,10 @@ SanitizerMask OpenBSD::getSupportedSanitizers() const 
-     Res |= SanitizerKind::FuzzerNoLink;
-   }
- 
-+  if (IsX86_64) {
-+    Res |= SanitizerKind::KernelAddress;
-+  }
-+
-   return Res;
- }
- 
Index: patches/patch-clang_lib_Frontend_CompilerInvocation_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-clang_lib_Frontend_CompilerInvocation_cpp,v
diff -u -p -r1.1 patch-clang_lib_Frontend_CompilerInvocation_cpp
--- patches/patch-clang_lib_Frontend_CompilerInvocation_cpp     27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-clang_lib_Frontend_CompilerInvocation_cpp     11 Dec 2024 
06:47:11 -0000
@@ -1,23 +1,23 @@
 Index: clang/lib/Frontend/CompilerInvocation.cpp
 --- clang/lib/Frontend/CompilerInvocation.cpp.orig
 +++ clang/lib/Frontend/CompilerInvocation.cpp
-@@ -1505,6 +1505,10 @@ void CompilerInvocation::GenerateCodeGenArgs(
-                 F.Filename, SA);
+@@ -1619,6 +1619,10 @@ void CompilerInvocationBase::GenerateCodeGenArgs(const
+                 F.Filename);
    }
  
 +  if (Opts.ReturnProtector) {
-+    GenerateArg(Args, OPT_ret_protector, SA);
++    GenerateArg(Consumer, OPT_ret_protector);
 +  }
 +
-   GenerateArg(
-       Args, Opts.EmulatedTLS ? OPT_femulated_tls : OPT_fno_emulated_tls, SA);
+   if (Opts.EmulatedTLS)
+     GenerateArg(Consumer, OPT_femulated_tls);
  
-@@ -1866,6 +1870,8 @@ bool CompilerInvocation::ParseCodeGenArgs(CodeGenOptio
+@@ -1974,6 +1978,8 @@ bool CompilerInvocation::ParseCodeGenArgs(CodeGenOptio
      }
      Opts.LinkBitcodeFiles.push_back(F);
    }
 +
 +  Opts.ReturnProtector = Args.hasArg(OPT_ret_protector);
  
-   if (!Args.getLastArg(OPT_femulated_tls) &&
-       !Args.getLastArg(OPT_fno_emulated_tls)) {
+   if (Arg *A = Args.getLastArg(OPT_ftlsmodel_EQ)) {
+     if (T.isOSAIX()) {
Index: patches/patch-clang_lib_Sema_SemaChecking_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-clang_lib_Sema_SemaChecking_cpp,v
diff -u -p -r1.1 patch-clang_lib_Sema_SemaChecking_cpp
--- patches/patch-clang_lib_Sema_SemaChecking_cpp       27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-clang_lib_Sema_SemaChecking_cpp       11 Dec 2024 06:47:11 
-0000
@@ -1,7 +1,7 @@
 Index: clang/lib/Sema/SemaChecking.cpp
 --- clang/lib/Sema/SemaChecking.cpp.orig
 +++ clang/lib/Sema/SemaChecking.cpp
-@@ -9098,7 +9098,7 @@ static const Expr *maybeConstEvalStringLiteral(ASTCont
+@@ -10829,7 +10829,7 @@ static const Expr *maybeConstEvalStringLiteral(ASTCont
  Sema::FormatStringType Sema::GetFormatStringType(const FormatAttr *Format) {
    return llvm::StringSwitch<FormatStringType>(Format->getType()->getName())
        .Case("scanf", FST_Scanf)
@@ -10,7 +10,7 @@ Index: clang/lib/Sema/SemaChecking.cpp
        .Cases("NSString", "CFString", FST_NSString)
        .Case("strftime", FST_Strftime)
        .Case("strfmon", FST_Strfmon)
-@@ -9195,6 +9195,7 @@ bool Sema::CheckFormatArguments(ArrayRef<const Expr *>
+@@ -10926,6 +10926,7 @@ bool Sema::CheckFormatArguments(ArrayRef<const Expr *>
      case FST_Kprintf:
      case FST_FreeBSDKPrintf:
      case FST_Printf:
@@ -18,7 +18,7 @@ Index: clang/lib/Sema/SemaChecking.cpp
        Diag(FormatLoc, diag::note_format_security_fixit)
          << FixItHint::CreateInsertion(FormatLoc, "\"%s\", ");
        break;
-@@ -10018,19 +10019,34 @@ bool CheckPrintfHandler::HandlePrintfSpecifier(
+@@ -11749,19 +11750,34 @@ bool CheckPrintfHandler::HandlePrintfSpecifier(
      // Claim the second argument.
      CoveredArgs.set(argIndex + 1);
  
@@ -62,7 +62,7 @@ Index: clang/lib/Sema/SemaChecking.cpp
      // Type check the second argument (char * for both %b and %D)
      Ex = getDataArg(argIndex + 1);
      const analyze_printf::ArgType &AT2 = ArgType::CStrTy;
-@@ -10068,6 +10084,15 @@ bool CheckPrintfHandler::HandlePrintfSpecifier(
+@@ -11799,6 +11815,15 @@ bool CheckPrintfHandler::HandlePrintfSpecifier(
      return true;
    }
  
@@ -78,7 +78,7 @@ Index: clang/lib/Sema/SemaChecking.cpp
    // Only scalars are allowed for os_trace.
    if (FSType == Sema::FST_OSTrace &&
        (CS.getKind() == ConversionSpecifier::PArg ||
-@@ -10869,8 +10894,9 @@ static void CheckFormatString(
+@@ -12616,8 +12641,9 @@ static void CheckFormatString(
    }
  
    if (Type == Sema::FST_Printf || Type == Sema::FST_NSString ||
@@ -90,7 +90,7 @@ Index: clang/lib/Sema/SemaChecking.cpp
      CheckPrintfHandler H(
          S, FExpr, OrigFormatExpr, Type, firstDataArg, numDataArgs,
          (Type == Sema::FST_NSString || Type == Sema::FST_OSTrace), Str, APK,
-@@ -10879,7 +10905,7 @@ static void CheckFormatString(
+@@ -12626,7 +12652,7 @@ static void CheckFormatString(
  
      if (!analyze_format_string::ParsePrintfString(
              H, Str, Str + StrLen, S.getLangOpts(), S.Context.getTargetInfo(),
Index: patches/patch-clang_lib_Sema_SemaDeclAttr_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-clang_lib_Sema_SemaDeclAttr_cpp,v
diff -u -p -r1.1 patch-clang_lib_Sema_SemaDeclAttr_cpp
--- patches/patch-clang_lib_Sema_SemaDeclAttr_cpp       27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-clang_lib_Sema_SemaDeclAttr_cpp       11 Dec 2024 06:47:11 
-0000
@@ -1,7 +1,7 @@
 Index: clang/lib/Sema/SemaDeclAttr.cpp
 --- clang/lib/Sema/SemaDeclAttr.cpp.orig
 +++ clang/lib/Sema/SemaDeclAttr.cpp
-@@ -3819,6 +3819,7 @@ static FormatAttrKind getFormatAttrKind(StringRef Form
+@@ -3870,6 +3870,7 @@ static FormatAttrKind getFormatAttrKind(StringRef Form
        .Case("freebsd_kprintf", SupportedFormat) // FreeBSD.
        .Case("os_trace", SupportedFormat)
        .Case("os_log", SupportedFormat)
Index: patches/patch-clang_tools_clang-shlib_CMakeLists_txt
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-clang_tools_clang-shlib_CMakeLists_txt,v
diff -u -p -r1.1 patch-clang_tools_clang-shlib_CMakeLists_txt
--- patches/patch-clang_tools_clang-shlib_CMakeLists_txt        27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-clang_tools_clang-shlib_CMakeLists_txt        11 Dec 2024 
06:47:11 -0000
@@ -3,11 +3,12 @@
 Index: clang/tools/clang-shlib/CMakeLists.txt
 --- clang/tools/clang-shlib/CMakeLists.txt.orig
 +++ clang/tools/clang-shlib/CMakeLists.txt
-@@ -50,6 +50,6 @@ add_clang_library(clang-cpp
+@@ -50,7 +50,7 @@ add_clang_library(clang-cpp
                    ${_DEPS})
  # Optimize function calls for default visibility definitions to avoid PLT and
  # reduce dynamic relocations.
--if (NOT APPLE AND NOT MINGW)
-+if (NOT APPLE AND NOT MINGW AND ${OPENBSD_LD_IS_LLD})
+-if (NOT APPLE AND NOT MINGW AND NOT LLVM_LINKER_IS_SOLARISLD_ILLUMOS)
++if (NOT APPLE AND NOT MINGW AND NOT LLVM_LINKER_IS_SOLARISLD_ILLUMOS AND 
${OPENBSD_LD_IS_LLD})
    target_link_options(clang-cpp PRIVATE LINKER:-Bsymbolic-functions)
  endif()
+ if (MINGW OR CYGWIN)
Index: patches/patch-compiler-rt_lib_interception_interception_h
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-compiler-rt_lib_interception_interception_h,v
diff -u -p -r1.1 patch-compiler-rt_lib_interception_interception_h
--- patches/patch-compiler-rt_lib_interception_interception_h   27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-compiler-rt_lib_interception_interception_h   11 Dec 2024 
06:47:11 -0000
@@ -1,16 +1,16 @@
 Index: compiler-rt/lib/interception/interception.h
 --- compiler-rt/lib/interception/interception.h.orig
 +++ compiler-rt/lib/interception/interception.h
-@@ -18,7 +18,7 @@
+@@ -19,7 +19,7 @@
  
- #if !SANITIZER_LINUX && !SANITIZER_FREEBSD && !SANITIZER_APPLE &&      \
+ #if !SANITIZER_LINUX && !SANITIZER_FREEBSD && !SANITIZER_APPLE &&    \
      !SANITIZER_NETBSD && !SANITIZER_WINDOWS && !SANITIZER_FUCHSIA && \
 -    !SANITIZER_SOLARIS
 +    !SANITIZER_OPENBSD && !SANITIZER_SOLARIS
  #  error "Interception doesn't work on this operating system."
  #endif
  
-@@ -272,7 +272,7 @@ typedef unsigned long uptr;
+@@ -353,7 +353,7 @@ typedef unsigned long uptr;
  #define INCLUDED_FROM_INTERCEPTION_LIB
  
  #if SANITIZER_LINUX || SANITIZER_FREEBSD || SANITIZER_NETBSD || \
Index: patches/patch-compiler-rt_lib_interception_interception_linux_h
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-compiler-rt_lib_interception_interception_linux_h,v
diff -u -p -r1.1 patch-compiler-rt_lib_interception_interception_linux_h
--- patches/patch-compiler-rt_lib_interception_interception_linux_h     27 May 
2024 18:14:08 -0000      1.1
+++ patches/patch-compiler-rt_lib_interception_interception_linux_h     11 Dec 
2024 06:47:11 -0000
@@ -9,4 +9,4 @@ Index: compiler-rt/lib/interception/inte
 +    SANITIZER_OPENBSD || SANITIZER_SOLARIS
  
  #if !defined(INCLUDED_FROM_INTERCEPTION_LIB)
- # error "interception_linux.h should be included from interception library 
only"
+ # error interception_linux.h should be included from interception library only
Index: patches/patch-compiler-rt_lib_sanitizer_common_sanitizer_linux_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-compiler-rt_lib_sanitizer_common_sanitizer_linux_cpp,v
diff -u -p -r1.1 patch-compiler-rt_lib_sanitizer_common_sanitizer_linux_cpp
--- patches/patch-compiler-rt_lib_sanitizer_common_sanitizer_linux_cpp  27 May 
2024 18:14:08 -0000      1.1
+++ patches/patch-compiler-rt_lib_sanitizer_common_sanitizer_linux_cpp  11 Dec 
2024 06:47:11 -0000
@@ -1,12 +1,12 @@
 Index: compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
 --- compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp.orig
 +++ compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
-@@ -598,7 +598,7 @@ u64 NanoTime() {
+@@ -591,7 +591,7 @@ u64 NanoTime() {
  // 'environ' array (on some others) and does not use libc. This function
  // should be called first inside __asan_init.
  const char *GetEnv(const char *name) {
--#if SANITIZER_FREEBSD || SANITIZER_NETBSD || SANITIZER_SOLARIS
-+#if SANITIZER_FREEBSD || SANITIZER_NETBSD || SANITIZER_OPENBSD || 
SANITIZER_SOLARIS
+-#  if SANITIZER_FREEBSD || SANITIZER_NETBSD || SANITIZER_SOLARIS
++#  if SANITIZER_FREEBSD || SANITIZER_NETBSD || SANITIZER_SOLARIS || 
SANITZER_OPENBSD
    if (::environ != 0) {
      uptr NameLen = internal_strlen(name);
      for (char **Env = ::environ; *Env != 0; Env++) {
Index: patches/patch-compiler-rt_lib_sanitizer_common_sanitizer_linux_h
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-compiler-rt_lib_sanitizer_common_sanitizer_linux_h,v
diff -u -p -r1.1 patch-compiler-rt_lib_sanitizer_common_sanitizer_linux_h
--- patches/patch-compiler-rt_lib_sanitizer_common_sanitizer_linux_h    27 May 
2024 18:14:08 -0000      1.1
+++ patches/patch-compiler-rt_lib_sanitizer_common_sanitizer_linux_h    11 Dec 
2024 06:47:11 -0000
@@ -4,9 +4,9 @@ Index: compiler-rt/lib/sanitizer_common/
 @@ -14,7 +14,7 @@
  
  #include "sanitizer_platform.h"
- #if SANITIZER_FREEBSD || SANITIZER_LINUX || SANITIZER_NETBSD ||               
 \
+ #if SANITIZER_FREEBSD || SANITIZER_LINUX || SANITIZER_NETBSD || \
 -    SANITIZER_SOLARIS
-+    SANITIZER_OPENBSD || SANITIZER_SOLARIS
- #include "sanitizer_common.h"
- #include "sanitizer_internal_defs.h"
- #include "sanitizer_platform_limits_freebsd.h"
++    SANITIZER_SOLARIS || SANITIZER_OPENBSD
+ #  include "sanitizer_common.h"
+ #  include "sanitizer_internal_defs.h"
+ #  include "sanitizer_platform_limits_freebsd.h"
Index: patches/patch-flang_docs_conf_py
===================================================================
RCS file: patches/patch-flang_docs_conf_py
diff -N patches/patch-flang_docs_conf_py
--- /dev/null   1 Jan 1970 00:00:00 -0000
+++ patches/patch-flang_docs_conf_py    11 Dec 2024 06:47:11 -0000
@@ -0,0 +1,27 @@
+Index: flang/docs/conf.py
+--- flang/docs/conf.py.orig
++++ flang/docs/conf.py
+@@ -22,12 +22,22 @@ from datetime import date
+ # Add any Sphinx extension module names here, as strings. They can be 
extensions
+ # coming with Sphinx (named 'sphinx.ext.*') or your custom ones.
+ extensions = [
+-    "myst_parser",
+     "sphinx.ext.todo",
+     "sphinx.ext.mathjax",
+     "sphinx.ext.intersphinx",
+     "sphinx.ext.autodoc",
+ ]
++
++# When building man pages, we do not use the markdown pages,
++# So, we can continue without the myst_parser dependencies.
++# Doing so reduces dependencies of some packaged llvm distributions.
++try:
++    import myst_parser
++
++    extensions.append("myst_parser")
++except ImportError:
++    if not tags.has("builder-man"):
++        raise
+ 
+ # Add any paths that contain templates here, relative to this directory.
+ templates_path = ["_templates"]
Index: patches/patch-libcxx_include_stdio_h
===================================================================
RCS file: patches/patch-libcxx_include_stdio_h
diff -N patches/patch-libcxx_include_stdio_h
--- patches/patch-libcxx_include_stdio_h        27 May 2024 18:14:08 -0000      
1.1
+++ /dev/null   1 Jan 1970 00:00:00 -0000
@@ -1,12 +0,0 @@
-Index: libcxx/include/stdio.h
---- libcxx/include/stdio.h.orig
-+++ libcxx/include/stdio.h
-@@ -115,6 +115,8 @@ void perror(const char* s);
- #undef clearerr
- #undef feof
- #undef ferror
-+#undef putchar
-+#undef getchar
- 
- #endif
- 
Index: patches/patch-libunwind_src_AddressSpace_hpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-libunwind_src_AddressSpace_hpp,v
diff -u -p -r1.1 patch-libunwind_src_AddressSpace_hpp
--- patches/patch-libunwind_src_AddressSpace_hpp        27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-libunwind_src_AddressSpace_hpp        11 Dec 2024 06:47:11 
-0000
@@ -9,7 +9,7 @@ Index: libunwind/src/AddressSpace.hpp
  
  #include "libunwind.h"
  #include "config.h"
-@@ -148,7 +149,63 @@ struct UnwindInfoSections {
+@@ -152,7 +153,63 @@ struct UnwindInfoSections {
  #endif
  };
  
@@ -73,7 +73,7 @@ Index: libunwind/src/AddressSpace.hpp
  /// LocalAddressSpace is used as a template parameter to UnwindCursor when
  /// unwinding a thread in the same process.  The wrappers compile away,
  /// making local unwinds fast.
-@@ -269,6 +326,10 @@ LocalAddressSpace::getEncodedP(pint_t &addr, pint_t en
+@@ -273,6 +330,10 @@ LocalAddressSpace::getEncodedP(pint_t &addr, pint_t en
    pint_t startAddr = addr;
    const uint8_t *p = (uint8_t *)addr;
    pint_t result;
Index: patches/patch-libunwind_src_EHHeaderParser_hpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-libunwind_src_EHHeaderParser_hpp,v
diff -u -p -r1.1 patch-libunwind_src_EHHeaderParser_hpp
--- patches/patch-libunwind_src_EHHeaderParser_hpp      27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-libunwind_src_EHHeaderParser_hpp      11 Dec 2024 06:47:11 
-0000
@@ -1,7 +1,7 @@
 Index: libunwind/src/EHHeaderParser.hpp
 --- libunwind/src/EHHeaderParser.hpp.orig
 +++ libunwind/src/EHHeaderParser.hpp
-@@ -145,6 +145,10 @@ bool EHHeaderParser<A>::findFDE(A &addressSpace, pint_
+@@ -158,6 +158,10 @@ bool EHHeaderParser<A>::findFDE(A &addressSpace, pint_
  
  template <typename A>
  size_t EHHeaderParser<A>::getTableEntrySize(uint8_t tableEnc) {
@@ -12,7 +12,7 @@ Index: libunwind/src/EHHeaderParser.hpp
    switch (tableEnc & 0x0f) {
    case DW_EH_PE_sdata2:
    case DW_EH_PE_udata2:
-@@ -158,8 +162,6 @@ size_t EHHeaderParser<A>::getTableEntrySize(uint8_t ta
+@@ -171,8 +175,6 @@ size_t EHHeaderParser<A>::getTableEntrySize(uint8_t ta
    case DW_EH_PE_sleb128:
    case DW_EH_PE_uleb128:
      _LIBUNWIND_ABORT("Can't binary search on variable length encoded data.");
Index: patches/patch-libunwind_src_UnwindCursor_hpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-libunwind_src_UnwindCursor_hpp,v
diff -u -p -r1.1 patch-libunwind_src_UnwindCursor_hpp
--- patches/patch-libunwind_src_UnwindCursor_hpp        27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-libunwind_src_UnwindCursor_hpp        11 Dec 2024 06:47:11 
-0000
@@ -1,7 +1,7 @@
 Index: libunwind/src/UnwindCursor.hpp
 --- libunwind/src/UnwindCursor.hpp.orig
 +++ libunwind/src/UnwindCursor.hpp
-@@ -88,6 +88,8 @@ extern "C" _Unwind_Reason_Code __libunwind_seh_persona
+@@ -91,6 +91,8 @@ extern "C" _Unwind_Reason_Code __libunwind_seh_persona
  
  namespace libunwind {
  
@@ -10,7 +10,7 @@ Index: libunwind/src/UnwindCursor.hpp
  #if defined(_LIBUNWIND_SUPPORT_DWARF_UNWIND)
  /// Cache of recently found FDEs.
  template <typename A>
-@@ -2537,7 +2539,14 @@ void UnwindCursor<A, R>::setInfoBasedOnIPRegister(bool
+@@ -2592,7 +2594,14 @@ void UnwindCursor<A, R>::setInfoBasedOnIPRegister(bool
  
    // Ask address space object to find unwind sections for this pc.
    UnwindInfoSections sects;
Index: patches/patch-llvm_docs_conf_py
===================================================================
RCS file: patches/patch-llvm_docs_conf_py
diff -N patches/patch-llvm_docs_conf_py
--- /dev/null   1 Jan 1970 00:00:00 -0000
+++ patches/patch-llvm_docs_conf_py     11 Dec 2024 06:47:11 -0000
@@ -0,0 +1,23 @@
+Index: llvm/docs/conf.py
+--- llvm/docs/conf.py.orig
++++ llvm/docs/conf.py
+@@ -26,7 +26,18 @@ sys.path.insert(0, os.path.abspath("."))
+ 
+ # Add any Sphinx extension module names here, as strings. They can be 
extensions
+ # coming with Sphinx (named 'sphinx.ext.*') or your custom ones.
+-extensions = ["myst_parser", "sphinx.ext.intersphinx", "sphinx.ext.todo"]
++extensions = ["sphinx.ext.intersphinx", "sphinx.ext.todo"]
++
++# When building man pages, we do not use the markdown pages,
++# So, we can continue without the myst_parser dependencies.
++# Doing so reduces dependencies of some packaged llvm distributions.
++try:
++    import myst_parser
++
++    extensions.append("myst_parser")
++except ImportError:
++    if not tags.has("builder-man"):
++        raise
+ 
+ # Automatic anchors for markdown titles
+ from llvm_slug import make_slug
Index: patches/patch-llvm_include_llvm_BinaryFormat_ELF_h
===================================================================
RCS file: patches/patch-llvm_include_llvm_BinaryFormat_ELF_h
diff -N patches/patch-llvm_include_llvm_BinaryFormat_ELF_h
--- patches/patch-llvm_include_llvm_BinaryFormat_ELF_h  27 May 2024 18:14:08 
-0000      1.1
+++ /dev/null   1 Jan 1970 00:00:00 -0000
@@ -1,12 +0,0 @@
-Index: llvm/include/llvm/BinaryFormat/ELF.h
---- llvm/include/llvm/BinaryFormat/ELF.h.orig
-+++ llvm/include/llvm/BinaryFormat/ELF.h
-@@ -1404,6 +1404,8 @@ enum {
-   PT_OPENBSD_MUTABLE = 0x65a3dbe5,   // Like bss, but not immutable.
-   PT_OPENBSD_RANDOMIZE = 0x65a3dbe6, // Fill with random data.
-   PT_OPENBSD_WXNEEDED = 0x65a3dbe7,  // Program does W^X violations.
-+  PT_OPENBSD_NOBTCFI = 0x65a3dbe8,   // Do not enforce branch target CFI
-+  PT_OPENBSD_SYSCALLS = 0x65a3dbe9,  // System call sites.
-   PT_OPENBSD_BOOTDATA = 0x65a41be6,  // Section for boot arguments.
- 
-   // ARM program header types.
Index: patches/patch-llvm_include_llvm_CodeGen_Passes_h
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_include_llvm_CodeGen_Passes_h,v
diff -u -p -r1.1 patch-llvm_include_llvm_CodeGen_Passes_h
--- patches/patch-llvm_include_llvm_CodeGen_Passes_h    27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-llvm_include_llvm_CodeGen_Passes_h    11 Dec 2024 06:47:12 
-0000
@@ -1,7 +1,7 @@
 Index: llvm/include/llvm/CodeGen/Passes.h
 --- llvm/include/llvm/CodeGen/Passes.h.orig
 +++ llvm/include/llvm/CodeGen/Passes.h
-@@ -374,6 +374,9 @@ namespace llvm {
+@@ -384,6 +384,9 @@ namespace llvm {
    ///
    FunctionPass *createStackProtectorPass();
  
Index: patches/patch-llvm_include_llvm_CodeGen_TargetFrameLowering_h
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_include_llvm_CodeGen_TargetFrameLowering_h,v
diff -u -p -r1.1 patch-llvm_include_llvm_CodeGen_TargetFrameLowering_h
--- patches/patch-llvm_include_llvm_CodeGen_TargetFrameLowering_h       27 May 
2024 18:14:08 -0000      1.1
+++ patches/patch-llvm_include_llvm_CodeGen_TargetFrameLowering_h       11 Dec 
2024 06:47:12 -0000
@@ -1,15 +1,15 @@
 Index: llvm/include/llvm/CodeGen/TargetFrameLowering.h
 --- llvm/include/llvm/CodeGen/TargetFrameLowering.h.orig
 +++ llvm/include/llvm/CodeGen/TargetFrameLowering.h
-@@ -14,6 +14,7 @@
- #define LLVM_CODEGEN_TARGETFRAMELOWERING_H
+@@ -15,6 +15,7 @@
  
+ #include "llvm/ADT/BitVector.h"
  #include "llvm/CodeGen/MachineBasicBlock.h"
 +#include "llvm/CodeGen/ReturnProtectorLowering.h"
  #include "llvm/Support/TypeSize.h"
  #include <vector>
  
-@@ -212,6 +213,10 @@ class TargetFrameLowering { (public)
+@@ -215,6 +216,10 @@ class TargetFrameLowering { (public)
                              MachineBasicBlock &MBB) const = 0;
    virtual void emitEpilogue(MachineFunction &MF,
                              MachineBasicBlock &MBB) const = 0;
Index: patches/patch-llvm_include_llvm_InitializePasses_h
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_include_llvm_InitializePasses_h,v
diff -u -p -r1.1 patch-llvm_include_llvm_InitializePasses_h
--- patches/patch-llvm_include_llvm_InitializePasses_h  27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-llvm_include_llvm_InitializePasses_h  11 Dec 2024 06:47:12 
-0000
@@ -1,11 +1,11 @@
 Index: llvm/include/llvm/InitializePasses.h
 --- llvm/include/llvm/InitializePasses.h.orig
 +++ llvm/include/llvm/InitializePasses.h
-@@ -351,6 +351,7 @@ void initializeRemoveRedundantDebugValuesPass(PassRegi
+@@ -264,6 +264,7 @@ void initializeRemoveRedundantDebugValuesPass(PassRegi
  void initializeRenameIndependentSubregsPass(PassRegistry&);
  void initializeReplaceWithVeclibLegacyPass(PassRegistry &);
  void initializeResetMachineFunctionPass(PassRegistry&);
 +void initializeReturnProtectorPass(PassRegistry&);
- void initializeReversePostOrderFunctionAttrsLegacyPassPass(PassRegistry&);
- void initializeRewriteStatepointsForGCLegacyPassPass(PassRegistry &);
- void initializeRewriteSymbolsLegacyPassPass(PassRegistry&);
+ void initializeSCEVAAWrapperPassPass(PassRegistry&);
+ void initializeSROALegacyPassPass(PassRegistry&);
+ void initializeSafeStackLegacyPassPass(PassRegistry&);
Index: patches/patch-llvm_lib_CodeGen_AsmPrinter_AsmPrinter_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_CodeGen_AsmPrinter_AsmPrinter_cpp,v
diff -u -p -r1.1 patch-llvm_lib_CodeGen_AsmPrinter_AsmPrinter_cpp
--- patches/patch-llvm_lib_CodeGen_AsmPrinter_AsmPrinter_cpp    27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_CodeGen_AsmPrinter_AsmPrinter_cpp    11 Dec 2024 
06:47:12 -0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
 --- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp.orig
 +++ llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
-@@ -900,7 +900,7 @@ void AsmPrinter::emitFunctionHeader() {
+@@ -954,7 +954,7 @@ void AsmPrinter::emitFunctionHeader() {
  
    emitLinkage(&F, CurrentFnSym);
    if (MAI->hasFunctionAlignment())
@@ -10,7 +10,7 @@ Index: llvm/lib/CodeGen/AsmPrinter/AsmPr
  
    if (MAI->hasDotTypeDotSizeDirective())
      OutStreamer->emitSymbolAttribute(CurrentFnSym, MCSA_ELF_TypeFunction);
-@@ -2849,6 +2849,30 @@ void AsmPrinter::emitAlignment(Align Alignment, const 
+@@ -3117,6 +3117,30 @@ void AsmPrinter::emitAlignment(Align Alignment, const 
  }
  
  
//===----------------------------------------------------------------------===//
@@ -41,7 +41,7 @@ Index: llvm/lib/CodeGen/AsmPrinter/AsmPr
  // Constant emission.
  
//===----------------------------------------------------------------------===//
  
-@@ -3687,10 +3711,18 @@ void AsmPrinter::emitBasicBlockStart(const MachineBasi
+@@ -3954,10 +3978,18 @@ void AsmPrinter::emitBasicBlockStart(const MachineBasi
      CurrentSectionBeginSym = MBB.getSymbol();
    }
  
Index: patches/patch-llvm_lib_CodeGen_CMakeLists_txt
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_CodeGen_CMakeLists_txt,v
diff -u -p -r1.1 patch-llvm_lib_CodeGen_CMakeLists_txt
--- patches/patch-llvm_lib_CodeGen_CMakeLists_txt       27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-llvm_lib_CodeGen_CMakeLists_txt       11 Dec 2024 06:47:12 
-0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/CodeGen/CMakeLists.txt
 --- llvm/lib/CodeGen/CMakeLists.txt.orig
 +++ llvm/lib/CodeGen/CMakeLists.txt
-@@ -196,6 +196,8 @@ add_llvm_component_library(LLVMCodeGen
+@@ -213,6 +213,8 @@ add_llvm_component_library(LLVMCodeGen
    RegUsageInfoPropagate.cpp
    ReplaceWithVeclib.cpp
    ResetMachineFunctionPass.cpp
Index: patches/patch-llvm_lib_CodeGen_PrologEpilogInserter_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_CodeGen_PrologEpilogInserter_cpp,v
diff -u -p -r1.1 patch-llvm_lib_CodeGen_PrologEpilogInserter_cpp
--- patches/patch-llvm_lib_CodeGen_PrologEpilogInserter_cpp     27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_CodeGen_PrologEpilogInserter_cpp     11 Dec 2024 
06:47:12 -0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/CodeGen/PrologEpilogInserter.cpp
 --- llvm/lib/CodeGen/PrologEpilogInserter.cpp.orig
 +++ llvm/lib/CodeGen/PrologEpilogInserter.cpp
-@@ -224,7 +224,11 @@ bool PEI::runOnMachineFunction(MachineFunction &MF) {
+@@ -223,7 +223,11 @@ bool PEI::runOnMachineFunction(MachineFunction &MF) {
    const Function &F = MF.getFunction();
    const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
    const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
@@ -13,7 +13,7 @@ Index: llvm/lib/CodeGen/PrologEpilogInse
    RS = TRI->requiresRegisterScavenging(MF) ? new RegScavenger() : nullptr;
    FrameIndexVirtualScavenging = TRI->requiresFrameIndexScavenging(MF);
    ORE = &getAnalysis<MachineOptimizationRemarkEmitterPass>().getORE();
-@@ -262,6 +266,10 @@ bool PEI::runOnMachineFunction(MachineFunction &MF) {
+@@ -261,6 +265,10 @@ bool PEI::runOnMachineFunction(MachineFunction &MF) {
    if (!F.hasFnAttribute(Attribute::Naked))
      insertPrologEpilogCode(MF);
  
@@ -24,7 +24,7 @@ Index: llvm/lib/CodeGen/PrologEpilogInse
    // Reinsert stashed debug values at the start of the entry blocks.
    for (auto &I : EntryDbgValues)
      I.first->insert(I.first->begin(), I.second.begin(), I.second.end());
-@@ -393,7 +401,9 @@ void PEI::calculateCallFrameInfo(MachineFunction &MF) 
+@@ -409,7 +417,9 @@ void PEI::calculateCallFrameInfo(MachineFunction &MF) 
  /// Compute the sets of entry and return blocks for saving and restoring
  /// callee-saved registers, and placing prolog and epilog code.
  void PEI::calculateSaveRestoreBlocks(MachineFunction &MF) {
@@ -35,7 +35,7 @@ Index: llvm/lib/CodeGen/PrologEpilogInse
  
    // Even when we do not change any CSR, we still want to insert the
    // prologue and epilogue of the function.
-@@ -409,7 +419,18 @@ void PEI::calculateSaveRestoreBlocks(MachineFunction &
+@@ -425,7 +435,18 @@ void PEI::calculateSaveRestoreBlocks(MachineFunction &
      // epilogue.
      if (!RestoreBlock->succ_empty() || RestoreBlock->isReturnBlock())
        RestoreBlocks.push_back(RestoreBlock);
@@ -55,7 +55,7 @@ Index: llvm/lib/CodeGen/PrologEpilogInse
    }
  
    // Save refs to entry and return blocks.
-@@ -420,6 +441,9 @@ void PEI::calculateSaveRestoreBlocks(MachineFunction &
+@@ -436,6 +457,9 @@ void PEI::calculateSaveRestoreBlocks(MachineFunction &
      if (MBB.isReturnBlock())
        RestoreBlocks.push_back(&MBB);
    }
@@ -65,7 +65,7 @@ Index: llvm/lib/CodeGen/PrologEpilogInse
  }
  
  static void assignCalleeSavedSpillSlots(MachineFunction &F,
-@@ -457,6 +481,10 @@ static void assignCalleeSavedSpillSlots(MachineFunctio
+@@ -473,6 +497,10 @@ static void assignCalleeSavedSpillSlots(MachineFunctio
  
    const TargetFrameLowering *TFI = F.getSubtarget().getFrameLowering();
    MachineFrameInfo &MFI = F.getFrameInfo();
Index: patches/patch-llvm_lib_CodeGen_ReturnProtectorLowering_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_CodeGen_ReturnProtectorLowering_cpp,v
diff -u -p -r1.1 patch-llvm_lib_CodeGen_ReturnProtectorLowering_cpp
--- patches/patch-llvm_lib_CodeGen_ReturnProtectorLowering_cpp  27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_CodeGen_ReturnProtectorLowering_cpp  11 Dec 2024 
06:47:12 -0000
@@ -310,7 +310,7 @@ Index: llvm/lib/CodeGen/ReturnProtectorL
 +  GlobalVariable *cookie =
 +      dyn_cast_or_null<GlobalVariable>(M->getGlobalVariable(
 +          Fn.getFnAttribute("ret-protector-cookie").getValueAsString(),
-+          Type::getInt8PtrTy(M->getContext())));
++          PointerType::getUnqual(M->getContext())));
 +
 +  if (!cookie)
 +    llvm_unreachable("Function needs return protector but no cookie 
assigned");
Index: patches/patch-llvm_lib_CodeGen_ReturnProtectorPass_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_CodeGen_ReturnProtectorPass_cpp,v
diff -u -p -r1.1 patch-llvm_lib_CodeGen_ReturnProtectorPass_cpp
--- patches/patch-llvm_lib_CodeGen_ReturnProtectorPass_cpp      27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_CodeGen_ReturnProtectorPass_cpp      11 Dec 2024 
06:47:12 -0000
@@ -40,7 +40,7 @@ Index: llvm/lib/CodeGen/ReturnProtectorP
 +        std::hash<std::string> hasher;
 +        std::string hash = std::to_string(hasher((M->getName() + 
F.getName()).str()) % 4000);
 +        std::string cookiename = "__retguard_" + hash;
-+        Type *cookietype = Type::getInt8PtrTy(M->getContext());
++        Type *cookietype = PointerType::getUnqual(M->getContext());
 +        GlobalVariable *cookie = dyn_cast_or_null<GlobalVariable>(
 +            M->getOrInsertGlobal(cookiename, cookietype));
 +        cookie->setInitializer(Constant::getNullValue(cookietype));
Index: patches/patch-llvm_lib_CodeGen_TargetPassConfig_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_CodeGen_TargetPassConfig_cpp,v
diff -u -p -r1.1 patch-llvm_lib_CodeGen_TargetPassConfig_cpp
--- patches/patch-llvm_lib_CodeGen_TargetPassConfig_cpp 27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-llvm_lib_CodeGen_TargetPassConfig_cpp 11 Dec 2024 06:47:12 
-0000
@@ -1,9 +1,9 @@
 Index: llvm/lib/CodeGen/TargetPassConfig.cpp
 --- llvm/lib/CodeGen/TargetPassConfig.cpp.orig
 +++ llvm/lib/CodeGen/TargetPassConfig.cpp
-@@ -977,6 +977,8 @@ void TargetPassConfig::addISelPrepare() {
-   if (requiresCodeGenSCCOrder())
-     addPass(new DummyCGSCCPass);
+@@ -948,6 +948,8 @@ void TargetPassConfig::addISelPrepare() {
+ 
+   addPass(createCallBrPass());
  
 +  addPass(createReturnProtectorPass());
 +
Index: patches/patch-llvm_lib_MC_MCAsmInfoELF_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_MC_MCAsmInfoELF_cpp,v
diff -u -p -r1.1 patch-llvm_lib_MC_MCAsmInfoELF_cpp
--- patches/patch-llvm_lib_MC_MCAsmInfoELF_cpp  27 May 2024 18:14:08 -0000      
1.1
+++ patches/patch-llvm_lib_MC_MCAsmInfoELF_cpp  11 Dec 2024 06:47:12 -0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/MC/MCAsmInfoELF.cpp
 --- llvm/lib/MC/MCAsmInfoELF.cpp.orig
 +++ llvm/lib/MC/MCAsmInfoELF.cpp
-@@ -25,7 +25,7 @@ MCSection *MCAsmInfoELF::getNonexecutableStackSection(
+@@ -29,7 +29,7 @@ MCSection *MCAsmInfoELF::getNonexecutableStackSection(
  }
  
  MCAsmInfoELF::MCAsmInfoELF() {
Index: patches/patch-llvm_lib_MC_MCParser_AsmParser_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_MC_MCParser_AsmParser_cpp,v
diff -u -p -r1.1 patch-llvm_lib_MC_MCParser_AsmParser_cpp
--- patches/patch-llvm_lib_MC_MCParser_AsmParser_cpp    27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-llvm_lib_MC_MCParser_AsmParser_cpp    11 Dec 2024 06:47:12 
-0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/MC/MCParser/AsmParser.cpp
 --- llvm/lib/MC/MCParser/AsmParser.cpp.orig
 +++ llvm/lib/MC/MCParser/AsmParser.cpp
-@@ -993,6 +993,10 @@ bool AsmParser::Run(bool NoInitialTextSection, bool No
+@@ -995,6 +995,10 @@ bool AsmParser::Run(bool NoInitialTextSection, bool No
      (void)InsertResult;
    }
  
Index: patches/patch-llvm_lib_Support_Unix_Process_inc
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Support_Unix_Process_inc,v
diff -u -p -r1.1 patch-llvm_lib_Support_Unix_Process_inc
--- patches/patch-llvm_lib_Support_Unix_Process_inc     27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-llvm_lib_Support_Unix_Process_inc     11 Dec 2024 06:47:12 
-0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/Support/Unix/Process.inc
 --- llvm/lib/Support/Unix/Process.inc.orig
 +++ llvm/lib/Support/Unix/Process.inc
-@@ -346,6 +346,10 @@ bool checkTerminalEnvironmentForColors() {
+@@ -350,6 +350,10 @@ bool checkTerminalEnvironmentForColors() {
  }
  
  static bool terminalHasColors(int fd) {
Index: patches/patch-llvm_lib_Target_AArch64_AArch64AsmPrinter_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_AArch64_AArch64AsmPrinter_cpp,v
diff -u -p -r1.1 patch-llvm_lib_Target_AArch64_AArch64AsmPrinter_cpp
--- patches/patch-llvm_lib_Target_AArch64_AArch64AsmPrinter_cpp 27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_AArch64_AArch64AsmPrinter_cpp 11 Dec 2024 
06:47:12 -0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
 --- llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp.orig
 +++ llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
-@@ -1662,6 +1662,18 @@ void AArch64AsmPrinter::emitInstruction(const MachineI
+@@ -1861,6 +1861,18 @@ void AArch64AsmPrinter::emitInstruction(const MachineI
      TS->emitARM64WinCFIEpilogEnd();
      return;
  
Index: patches/patch-llvm_lib_Target_AArch64_AArch64FrameLowering_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_AArch64_AArch64FrameLowering_cpp,v
diff -u -p -r1.1 patch-llvm_lib_Target_AArch64_AArch64FrameLowering_cpp
--- patches/patch-llvm_lib_Target_AArch64_AArch64FrameLowering_cpp      27 May 
2024 18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_AArch64_AArch64FrameLowering_cpp      11 Dec 
2024 06:47:12 -0000
@@ -9,7 +9,7 @@ Index: llvm/lib/Target/AArch64/AArch64Fr
  #include "AArch64Subtarget.h"
  #include "AArch64TargetMachine.h"
  #include "MCTargetDesc/AArch64AddressingModes.h"
-@@ -2987,6 +2988,10 @@ void AArch64FrameLowering::determineCalleeSaves(Machin
+@@ -3246,6 +3247,10 @@ void AArch64FrameLowering::determineCalleeSaves(Machin
                                  ? RegInfo->getBaseRegister()
                                  : (unsigned)AArch64::NoRegister;
  
@@ -18,9 +18,9 @@ Index: llvm/lib/Target/AArch64/AArch64Fr
 +  }
 +
    unsigned ExtraCSSpill = 0;
+   bool HasUnpairedGPR64 = false;
    // Figure out which callee-saved registers to save/restore.
-   for (unsigned i = 0; CSRegs[i]; ++i) {
-@@ -3799,6 +3804,10 @@ unsigned AArch64FrameLowering::getWinEHFuncletFrameSiz
+@@ -4127,6 +4132,10 @@ unsigned AArch64FrameLowering::getWinEHFuncletFrameSiz
    // This is the amount of stack a funclet needs to allocate.
    return alignTo(CSSize + MF.getFrameInfo().getMaxCallFrameSize(),
                   getStackAlign());
Index: patches/patch-llvm_lib_Target_AArch64_AArch64FrameLowering_h
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_AArch64_AArch64FrameLowering_h,v
diff -u -p -r1.1 patch-llvm_lib_Target_AArch64_AArch64FrameLowering_h
--- patches/patch-llvm_lib_Target_AArch64_AArch64FrameLowering_h        27 May 
2024 18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_AArch64_AArch64FrameLowering_h        11 Dec 
2024 06:47:12 -0000
@@ -30,5 +30,5 @@ Index: llvm/lib/Target/AArch64/AArch64Fr
 +
 +  const ReturnProtectorLowering *getReturnProtector() const override;
  
-   bool canUseAsPrologue(const MachineBasicBlock &MBB) const override;
+   bool enableCFIFixup(MachineFunction &MF) const override;
  
Index: patches/patch-llvm_lib_Target_AArch64_AArch64ISelLowering_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_AArch64_AArch64ISelLowering_cpp,v
diff -u -p -r1.1 patch-llvm_lib_Target_AArch64_AArch64ISelLowering_cpp
--- patches/patch-llvm_lib_Target_AArch64_AArch64ISelLowering_cpp       27 May 
2024 18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_AArch64_AArch64ISelLowering_cpp       11 Dec 
2024 06:47:12 -0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
 --- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp.orig
 +++ llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
-@@ -22256,7 +22256,8 @@ void AArch64TargetLowering::ReplaceNodeResults(
+@@ -24960,7 +24960,8 @@ void AArch64TargetLowering::ReplaceNodeResults(
  }
  
  bool AArch64TargetLowering::useLoadStackGuardNode() const {
Index: patches/patch-llvm_lib_Target_AArch64_AArch64InstrInfo_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_AArch64_AArch64InstrInfo_cpp,v
diff -u -p -r1.1 patch-llvm_lib_Target_AArch64_AArch64InstrInfo_cpp
--- patches/patch-llvm_lib_Target_AArch64_AArch64InstrInfo_cpp  27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_AArch64_AArch64InstrInfo_cpp  11 Dec 2024 
06:47:12 -0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
 --- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp.orig
 +++ llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
-@@ -108,6 +108,9 @@ unsigned AArch64InstrInfo::getInstSizeInBytes(const Ma
+@@ -117,6 +117,9 @@ unsigned AArch64InstrInfo::getInstSizeInBytes(const Ma
      // with fixed constant size but not specified in .td file) is a normal
      // 4-byte insn.
      NumBytes = 4;
Index: patches/patch-llvm_lib_Target_AArch64_AArch64InstrInfo_td
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_AArch64_AArch64InstrInfo_td,v
diff -u -p -r1.1 patch-llvm_lib_Target_AArch64_AArch64InstrInfo_td
--- patches/patch-llvm_lib_Target_AArch64_AArch64InstrInfo_td   27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_AArch64_AArch64InstrInfo_td   11 Dec 2024 
06:47:12 -0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/Target/AArch64/AArch64InstrInfo.td
 --- llvm/lib/Target/AArch64/AArch64InstrInfo.td.orig
 +++ llvm/lib/Target/AArch64/AArch64InstrInfo.td
-@@ -918,6 +918,14 @@ def ADDlowTLS
+@@ -1045,6 +1045,14 @@ def ADDlowTLS
  
  } // isReMaterializable, isCodeGenOnly
  
Index: patches/patch-llvm_lib_Target_AArch64_AArch64Subtarget_h
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_AArch64_AArch64Subtarget_h,v
diff -u -p -r1.1 patch-llvm_lib_Target_AArch64_AArch64Subtarget_h
--- patches/patch-llvm_lib_Target_AArch64_AArch64Subtarget_h    27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_AArch64_AArch64Subtarget_h    11 Dec 2024 
06:47:12 -0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/Target/AArch64/AArch64Subtarget.h
 --- llvm/lib/Target/AArch64/AArch64Subtarget.h.orig
 +++ llvm/lib/Target/AArch64/AArch64Subtarget.h
-@@ -261,6 +261,7 @@ class AArch64Subtarget final : public AArch64GenSubtar
+@@ -294,6 +294,7 @@ class AArch64Subtarget final : public AArch64GenSubtar
    bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
    bool isTargetIOS() const { return TargetTriple.isiOS(); }
    bool isTargetLinux() const { return TargetTriple.isOSLinux(); }
Index: patches/patch-llvm_lib_Target_AArch64_AArch64TargetMachine_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_AArch64_AArch64TargetMachine_cpp,v
diff -u -p -r1.1 patch-llvm_lib_Target_AArch64_AArch64TargetMachine_cpp
--- patches/patch-llvm_lib_Target_AArch64_AArch64TargetMachine_cpp      27 May 
2024 18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_AArch64_AArch64TargetMachine_cpp      11 Dec 
2024 06:47:12 -0000
@@ -1,10 +1,10 @@
 Index: llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
 --- llvm/lib/Target/AArch64/AArch64TargetMachine.cpp.orig
 +++ llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
-@@ -357,6 +357,7 @@ AArch64TargetMachine::AArch64TargetMachine(const Targe
+@@ -368,6 +368,7 @@ AArch64TargetMachine::AArch64TargetMachine(const Targe
    // Enable GlobalISel at or below EnableGlobalISelAt0, unless this is
    // MachO/CodeModel::Large, which GlobalISel does not support.
-   if (getOptLevel() <= EnableGlobalISelAtO &&
+   if (static_cast<int>(getOptLevel()) <= EnableGlobalISelAtO &&
 +      !getTargetTriple().isOSOpenBSD() &&
        TT.getArch() != Triple::aarch64_32 &&
        TT.getEnvironment() != Triple::GNUILP32 &&
Index: patches/patch-llvm_lib_Target_AArch64_CMakeLists_txt
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_AArch64_CMakeLists_txt,v
diff -u -p -r1.1 patch-llvm_lib_Target_AArch64_CMakeLists_txt
--- patches/patch-llvm_lib_Target_AArch64_CMakeLists_txt        27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_AArch64_CMakeLists_txt        11 Dec 2024 
06:47:12 -0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/Target/AArch64/CMakeLists.txt
 --- llvm/lib/Target/AArch64/CMakeLists.txt.orig
 +++ llvm/lib/Target/AArch64/CMakeLists.txt
-@@ -73,6 +73,7 @@ add_llvm_target(AArch64CodeGen
+@@ -76,6 +76,7 @@ add_llvm_target(AArch64CodeGen
    AArch64PromoteConstant.cpp
    AArch64PBQPRegAlloc.cpp
    AArch64RegisterInfo.cpp
Index: patches/patch-llvm_lib_Target_ARM_ARMISelLowering_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_ARM_ARMISelLowering_cpp,v
diff -u -p -r1.1 patch-llvm_lib_Target_ARM_ARMISelLowering_cpp
--- patches/patch-llvm_lib_Target_ARM_ARMISelLowering_cpp       27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_ARM_ARMISelLowering_cpp       11 Dec 2024 
06:47:12 -0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/Target/ARM/ARMISelLowering.cpp
 --- llvm/lib/Target/ARM/ARMISelLowering.cpp.orig
 +++ llvm/lib/Target/ARM/ARMISelLowering.cpp
-@@ -21198,6 +21198,8 @@ bool ARMTargetLowering::shouldInsertFencesForAtomic(
+@@ -21408,6 +21408,8 @@ bool ARMTargetLowering::shouldInsertFencesForAtomic(
  }
  
  bool ARMTargetLowering::useLoadStackGuardNode() const {
Index: patches/patch-llvm_lib_Target_Mips_AsmParser_MipsAsmParser_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_Mips_AsmParser_MipsAsmParser_cpp,v
diff -u -p -r1.1 patch-llvm_lib_Target_Mips_AsmParser_MipsAsmParser_cpp
--- patches/patch-llvm_lib_Target_Mips_AsmParser_MipsAsmParser_cpp      27 May 
2024 18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_Mips_AsmParser_MipsAsmParser_cpp      11 Dec 
2024 06:47:12 -0000
@@ -9,7 +9,7 @@ Index: llvm/lib/Target/Mips/AsmParser/Mi
  
  namespace {
  
-@@ -238,6 +239,9 @@ class MipsAsmParser : public MCTargetAsmParser {
+@@ -235,6 +236,9 @@ class MipsAsmParser : public MCTargetAsmParser {
  
    bool emitPartialAddress(MipsTargetStreamer &TOut, SMLoc IDLoc, MCSymbol 
*Sym);
  
@@ -19,7 +19,7 @@ Index: llvm/lib/Target/Mips/AsmParser/Mi
    bool expandLoadImm(MCInst &Inst, bool Is32BitImm, SMLoc IDLoc,
                       MCStreamer &Out, const MCSubtargetInfo *STI);
  
-@@ -2096,6 +2100,20 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, S
+@@ -2104,6 +2108,20 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, S
      Inst = BInst;
    }
  
@@ -40,7 +40,7 @@ Index: llvm/lib/Target/Mips/AsmParser/Mi
    // This expansion is not in a function called by tryExpandInstruction()
    // because the pseudo-instruction doesn't have a distinct opcode.
    if ((Opcode == Mips::JAL || Opcode == Mips::JAL_MM) && inPicMode()) {
-@@ -3325,6 +3343,39 @@ bool MipsAsmParser::emitPartialAddress(MipsTargetStrea
+@@ -3404,6 +3422,39 @@ bool MipsAsmParser::emitPartialAddress(MipsTargetStrea
        TOut.emitRRI(Mips::DSLL, ATReg, ATReg, 16, IDLoc, STI);
      }
    }
Index: patches/patch-llvm_lib_Target_Mips_MCTargetDesc_MipsABIInfo_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_Mips_MCTargetDesc_MipsABIInfo_cpp,v
diff -u -p -r1.1 patch-llvm_lib_Target_Mips_MCTargetDesc_MipsABIInfo_cpp
--- patches/patch-llvm_lib_Target_Mips_MCTargetDesc_MipsABIInfo_cpp     27 May 
2024 18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_Mips_MCTargetDesc_MipsABIInfo_cpp     11 Dec 
2024 06:47:12 -0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
 --- llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp.orig
 +++ llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
-@@ -23,6 +23,11 @@ EmitJalrReloc("mips-jalr-reloc", cl::Hidden,
+@@ -22,6 +22,11 @@ EmitJalrReloc("mips-jalr-reloc", cl::Hidden,
                cl::desc("MIPS: Emit R_{MICRO}MIPS_JALR relocation with jalr"),
                cl::init(true));
  
Index: patches/patch-llvm_lib_Target_Mips_MipsISelLowering_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_Mips_MipsISelLowering_cpp,v
diff -u -p -r1.1 patch-llvm_lib_Target_Mips_MipsISelLowering_cpp
--- patches/patch-llvm_lib_Target_Mips_MipsISelLowering_cpp     27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_Mips_MipsISelLowering_cpp     11 Dec 2024 
06:47:12 -0000
@@ -25,7 +25,7 @@ Index: llvm/lib/Target/Mips/MipsISelLowe
    case 'l': // lo register
    case 'x': // hilo register pair
      if (type->isIntegerTy())
-@@ -4163,6 +4166,11 @@ MipsTargetLowering::getRegForInlineAsmConstraint(const
+@@ -4167,6 +4170,11 @@ MipsTargetLowering::getRegForInlineAsmConstraint(const
          return std::make_pair((unsigned)Mips::T9_64, &Mips::GPR64RegClass);
        // This will generate an error message
        return std::make_pair(0U, nullptr);
Index: patches/patch-llvm_lib_Target_Mips_MipsInstrInfo_td
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_Mips_MipsInstrInfo_td,v
diff -u -p -r1.1 patch-llvm_lib_Target_Mips_MipsInstrInfo_td
--- patches/patch-llvm_lib_Target_Mips_MipsInstrInfo_td 27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-llvm_lib_Target_Mips_MipsInstrInfo_td 11 Dec 2024 06:47:12 
-0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/Target/Mips/MipsInstrInfo.td
 --- llvm/lib/Target/Mips/MipsInstrInfo.td.orig
 +++ llvm/lib/Target/Mips/MipsInstrInfo.td
-@@ -2016,6 +2016,31 @@ def LONG_BRANCH_ADDiu2Op : PseudoSE<(outs GPR32Opnd:$d
+@@ -2017,6 +2017,31 @@ def LONG_BRANCH_ADDiu2Op : PseudoSE<(outs GPR32Opnd:$d
    bit hasNoSchedulingInfo = 1;
  }
  
Index: patches/patch-llvm_lib_Target_PowerPC_CMakeLists_txt
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_PowerPC_CMakeLists_txt,v
diff -u -p -r1.1 patch-llvm_lib_Target_PowerPC_CMakeLists_txt
--- patches/patch-llvm_lib_Target_PowerPC_CMakeLists_txt        27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_PowerPC_CMakeLists_txt        11 Dec 2024 
06:47:12 -0000
@@ -1,8 +1,8 @@
 Index: llvm/lib/Target/PowerPC/CMakeLists.txt
 --- llvm/lib/Target/PowerPC/CMakeLists.txt.orig
 +++ llvm/lib/Target/PowerPC/CMakeLists.txt
-@@ -43,6 +43,7 @@ add_llvm_target(PowerPCCodeGen
-   PPCMacroFusion.cpp
+@@ -44,6 +44,7 @@ add_llvm_target(PowerPCCodeGen
+   PPCMergeStringPool.cpp
    PPCMIPeephole.cpp
    PPCRegisterInfo.cpp
 +  PPCReturnProtectorLowering.cpp
Index: patches/patch-llvm_lib_Target_PowerPC_PPCAsmPrinter_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_PowerPC_PPCAsmPrinter_cpp,v
diff -u -p -r1.1 patch-llvm_lib_Target_PowerPC_PPCAsmPrinter_cpp
--- patches/patch-llvm_lib_Target_PowerPC_PPCAsmPrinter_cpp     27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_PowerPC_PPCAsmPrinter_cpp     11 Dec 2024 
06:47:12 -0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
 --- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp.orig
 +++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
-@@ -835,6 +835,85 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr
+@@ -945,6 +945,85 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr
        return;
      }
    }
Index: patches/patch-llvm_lib_Target_PowerPC_PPCFrameLowering_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_PowerPC_PPCFrameLowering_cpp,v
diff -u -p -r1.1 patch-llvm_lib_Target_PowerPC_PPCFrameLowering_cpp
--- patches/patch-llvm_lib_Target_PowerPC_PPCFrameLowering_cpp  27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_PowerPC_PPCFrameLowering_cpp  11 Dec 2024 
06:47:12 -0000
@@ -5,27 +5,14 @@ Index: llvm/lib/Target/PowerPC/PPCFrameL
  #include "PPCInstrBuilder.h"
  #include "PPCInstrInfo.h"
  #include "PPCMachineFunctionInfo.h"
-+#include "PPCReturnProtectorLowering.h"
++#include "PPCReturnProtectorLowering.h"  
  #include "PPCSubtarget.h"
  #include "PPCTargetMachine.h"
  #include "llvm/ADT/Statistic.h"
-@@ -1192,12 +1193,6 @@ void PPCFrameLowering::emitPrologue(MachineFunction &M
-       if ((Reg == PPC::X2 || Reg == PPC::R2) && MustSaveTOC)
-         continue;
+@@ -2744,4 +2745,8 @@ uint64_t PPCFrameLowering::getStackThreshold() const {
+     return LONG_MAX;
  
--      // For SVR4, don't emit a move for the CR spill slot if we haven't
--      // spilled CRs.
--      if (isSVR4ABI && (PPC::CR2 <= Reg && Reg <= PPC::CR4)
--          && !MustSaveCR)
--        continue;
--
-       // For 64-bit SVR4 when we have spilled CRs, the spill location
-       // is SP+8, not a frame-relative slot.
-       if (isSVR4ABI && isPPC64 && (PPC::CR2 <= Reg && Reg <= PPC::CR4)) {
-@@ -2711,4 +2706,8 @@ bool PPCFrameLowering::enableShrinkWrapping(const Mach
-   if (MF.getInfo<PPCFunctionInfo>()->shrinkWrapDisabled())
-     return false;
-   return !MF.getSubtarget<PPCSubtarget>().is32BitELFABI();
+   return TargetFrameLowering::getStackThreshold();
 +}
 +
 +const ReturnProtectorLowering *PPCFrameLowering::getReturnProtector() const {
Index: patches/patch-llvm_lib_Target_PowerPC_PPCFrameLowering_h
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_PowerPC_PPCFrameLowering_h,v
diff -u -p -r1.1 patch-llvm_lib_Target_PowerPC_PPCFrameLowering_h
--- patches/patch-llvm_lib_Target_PowerPC_PPCFrameLowering_h    27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_PowerPC_PPCFrameLowering_h    11 Dec 2024 
06:47:12 -0000
@@ -5,14 +5,14 @@ Index: llvm/lib/Target/PowerPC/PPCFrameL
  #ifndef LLVM_LIB_TARGET_POWERPC_PPCFRAMELOWERING_H
  #define LLVM_LIB_TARGET_POWERPC_PPCFRAMELOWERING_H
  
-+#include "PPCReturnProtectorLowering.h"
++#include "PPCReturnProtectorLowering.h"  
  #include "llvm/ADT/STLExtras.h"
  #include "llvm/CodeGen/TargetFrameLowering.h"
  #include "llvm/Target/TargetMachine.h"
-@@ -173,6 +174,9 @@ class PPCFrameLowering: public TargetFrameLowering { (
-   /// function prologue/epilogue.
-   bool canUseAsPrologue(const MachineBasicBlock &MBB) const override;
+@@ -175,6 +176,9 @@ class PPCFrameLowering: public TargetFrameLowering { (
    bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override;
+ 
+   uint64_t getStackThreshold() const override;
 +
 +  const PPCReturnProtectorLowering RPL;
 +  const ReturnProtectorLowering *getReturnProtector() const override;
Index: patches/patch-llvm_lib_Target_PowerPC_PPCISelDAGToDAG_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_PowerPC_PPCISelDAGToDAG_cpp,v
diff -u -p -r1.1 patch-llvm_lib_Target_PowerPC_PPCISelDAGToDAG_cpp
--- patches/patch-llvm_lib_Target_PowerPC_PPCISelDAGToDAG_cpp   27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_PowerPC_PPCISelDAGToDAG_cpp   11 Dec 2024 
06:47:12 -0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
 --- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp.orig
 +++ llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
-@@ -5293,7 +5293,8 @@ void PPCDAGToDAGISel::Select(SDNode *N) {
+@@ -5485,7 +5485,8 @@ void PPCDAGToDAGISel::Select(SDNode *N) {
      // generate secure plt code for TLS symbols.
      getGlobalBaseReg();
    } break;
Index: patches/patch-llvm_lib_Target_PowerPC_PPCInstrInfo_td
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_PowerPC_PPCInstrInfo_td,v
diff -u -p -r1.1 patch-llvm_lib_Target_PowerPC_PPCInstrInfo_td
--- patches/patch-llvm_lib_Target_PowerPC_PPCInstrInfo_td       27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_PowerPC_PPCInstrInfo_td       11 Dec 2024 
06:47:12 -0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td
 --- llvm/lib/Target/PowerPC/PPCInstrInfo.td.orig
 +++ llvm/lib/Target/PowerPC/PPCInstrInfo.td
-@@ -1226,6 +1226,31 @@ let Defs = [LR] in
+@@ -1338,6 +1338,31 @@ let Defs = [LR] in
    def MoveGOTtoLR : PPCEmitTimePseudo<(outs), (ins), "#MoveGOTtoLR", []>,
                      PPC970_Unit_BRU;
  
Index: patches/patch-llvm_lib_Target_RISCV_RISCVISelLowering_cpp
===================================================================
RCS file: patches/patch-llvm_lib_Target_RISCV_RISCVISelLowering_cpp
diff -N patches/patch-llvm_lib_Target_RISCV_RISCVISelLowering_cpp
--- patches/patch-llvm_lib_Target_RISCV_RISCVISelLowering_cpp   27 May 2024 
18:14:08 -0000      1.1
+++ /dev/null   1 Jan 1970 00:00:00 -0000
@@ -1,14 +0,0 @@
-Index: llvm/lib/Target/RISCV/RISCVISelLowering.cpp
---- llvm/lib/Target/RISCV/RISCVISelLowering.cpp.orig
-+++ llvm/lib/Target/RISCV/RISCVISelLowering.cpp
-@@ -4537,6 +4537,10 @@ SDValue RISCVTargetLowering::getDynamicTLSAddr(GlobalA
- 
- SDValue RISCVTargetLowering::lowerGlobalTLSAddress(SDValue Op,
-                                                    SelectionDAG &DAG) const {
-+  const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(Op);
-+  if (DAG.getTarget().useEmulatedTLS())
-+    return LowerToTLSEmulatedModel(GA, DAG);
-+
-   GlobalAddressSDNode *N = cast<GlobalAddressSDNode>(Op);
-   assert(N->getOffset() == 0 && "unexpected offset in global node");
- 
Index: patches/patch-llvm_lib_Target_X86_CMakeLists_txt
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_X86_CMakeLists_txt,v
diff -u -p -r1.1 patch-llvm_lib_Target_X86_CMakeLists_txt
--- patches/patch-llvm_lib_Target_X86_CMakeLists_txt    27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-llvm_lib_Target_X86_CMakeLists_txt    11 Dec 2024 06:47:12 
-0000
@@ -1,17 +1,18 @@
 Index: llvm/lib/Target/X86/CMakeLists.txt
 --- llvm/lib/Target/X86/CMakeLists.txt.orig
 +++ llvm/lib/Target/X86/CMakeLists.txt
-@@ -45,6 +45,7 @@ set(sources
+@@ -42,6 +42,8 @@ set(sources
    X86ExpandPseudo.cpp
    X86FastISel.cpp
    X86FixupBWInsts.cpp
 +  X86FixupGadgets.cpp
++  X86RetClean.cpp
    X86FixupLEAs.cpp
-   X86AvoidStoreForwardingBlocks.cpp
-   X86DynAllocaExpander.cpp
-@@ -76,6 +77,7 @@ set(sources
+   X86FixupInstTuning.cpp
+   X86FixupVectorConstants.cpp
+@@ -72,6 +74,7 @@ set(sources
+   X86PadShortFunction.cpp
    X86PartialReduction.cpp
-   X86RegisterBankInfo.cpp
    X86RegisterInfo.cpp
 +  X86ReturnProtectorLowering.cpp
    X86ReturnThunks.cpp
Index: patches/patch-llvm_lib_Target_X86_MCTargetDesc_X86AsmBackend_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_X86_MCTargetDesc_X86AsmBackend_cpp,v
diff -u -p -r1.1 patch-llvm_lib_Target_X86_MCTargetDesc_X86AsmBackend_cpp
--- patches/patch-llvm_lib_Target_X86_MCTargetDesc_X86AsmBackend_cpp    27 May 
2024 18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_X86_MCTargetDesc_X86AsmBackend_cpp    11 Dec 
2024 06:47:12 -0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
 --- llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp.orig
 +++ llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
-@@ -1018,56 +1018,23 @@ unsigned X86AsmBackend::getMaximumNopSize(const MCSubt
+@@ -994,56 +994,22 @@ unsigned X86AsmBackend::getMaximumNopSize(const MCSubt
  /// \return - true on success, false on failure
  bool X86AsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
                                   const MCSubtargetInfo *STI) const {
@@ -27,7 +27,7 @@ Index: llvm/lib/Target/X86/MCTargetDesc/
 -      // nopw %cs:0L(%[re]ax,%[re]ax,1)
 -      "\x66\x2e\x0f\x1f\x84\x00\x00\x00\x00\x00",
 -  };
- 
+-
 -  // 16-bit mode uses different nop patterns than 32-bit.
 -  static const char Nops16Bit[4][11] = {
 -      // nop
@@ -41,7 +41,7 @@ Index: llvm/lib/Target/X86/MCTargetDesc/
 -  };
 -
 -  const char(*Nops)[11] =
--      STI->getFeatureBits()[X86::Is16Bit] ? Nops16Bit : Nops32Bit;
+-      STI->hasFeature(X86::Is16Bit) ? Nops16Bit : Nops32Bit;
 -
 -  uint64_t MaxNopLength = (uint64_t)getMaximumNopSize(*STI);
 -
Index: patches/patch-llvm_lib_Target_X86_X86AsmPrinter_h
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_X86_X86AsmPrinter_h,v
diff -u -p -r1.1 patch-llvm_lib_Target_X86_X86AsmPrinter_h
--- patches/patch-llvm_lib_Target_X86_X86AsmPrinter_h   27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-llvm_lib_Target_X86_X86AsmPrinter_h   11 Dec 2024 06:47:12 
-0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/Target/X86/X86AsmPrinter.h
 --- llvm/lib/Target/X86/X86AsmPrinter.h.orig
 +++ llvm/lib/Target/X86/X86AsmPrinter.h
-@@ -136,6 +136,8 @@ class LLVM_LIBRARY_VISIBILITY X86AsmPrinter : public A
+@@ -141,6 +141,8 @@ class LLVM_LIBRARY_VISIBILITY X86AsmPrinter : public A
  
    void emitInstruction(const MachineInstr *MI) override;
  
Index: patches/patch-llvm_lib_Target_X86_X86FixupGadgets_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_X86_X86FixupGadgets_cpp,v
diff -u -p -r1.1 patch-llvm_lib_Target_X86_X86FixupGadgets_cpp
--- patches/patch-llvm_lib_Target_X86_X86FixupGadgets_cpp       27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_X86_X86FixupGadgets_cpp       11 Dec 2024 
06:47:12 -0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/Target/X86/X86FixupGadgets.cpp
 --- llvm/lib/Target/X86/X86FixupGadgets.cpp.orig
 +++ llvm/lib/Target/X86/X86FixupGadgets.cpp
-@@ -0,0 +1,704 @@
+@@ -0,0 +1,701 @@
 +//===-- X86FixupGadgets.cpp - Fixup Instructions that make ROP Gadgets 
----===//
 +//
 +//                     The LLVM Compiler Infrastructure
@@ -207,9 +207,6 @@ Index: llvm/lib/Target/X86/X86FixupGadge
 +    case X86::ADD16ri_DB:
 +    case X86::ADD32ri_DB:
 +    case X86::ADD64ri32_DB:
-+    case X86::ADD16ri8_DB:
-+    case X86::ADD32ri8_DB:
-+    case X86::ADD64ri8_DB:
 +      goto Handle_MRMXr;
 +    default:
 +      break;
Index: patches/patch-llvm_lib_Target_X86_X86FrameLowering_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_X86_X86FrameLowering_cpp,v
diff -u -p -r1.1 patch-llvm_lib_Target_X86_X86FrameLowering_cpp
--- patches/patch-llvm_lib_Target_X86_X86FrameLowering_cpp      27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_X86_X86FrameLowering_cpp      11 Dec 2024 
06:47:12 -0000
@@ -8,8 +8,8 @@ Index: llvm/lib/Target/X86/X86FrameLower
 +#include "X86ReturnProtectorLowering.h"
  #include "X86Subtarget.h"
  #include "X86TargetMachine.h"
- #include "llvm/ADT/SmallSet.h"
-@@ -48,7 +49,7 @@ X86FrameLowering::X86FrameLowering(const X86Subtarget 
+ #include "llvm/ADT/Statistic.h"
+@@ -49,7 +50,7 @@ X86FrameLowering::X86FrameLowering(const X86Subtarget 
                                     MaybeAlign StackAlignOverride)
      : TargetFrameLowering(StackGrowsDown, StackAlignOverride.valueOrOne(),
                            STI.is64Bit() ? -8 : -4),
@@ -18,7 +18,7 @@ Index: llvm/lib/Target/X86/X86FrameLower
    // Cache a bunch of frame-related predicates for this subtarget.
    SlotSize = TRI->getSlotSize();
    Is64Bit = STI.is64Bit();
-@@ -56,6 +57,7 @@ X86FrameLowering::X86FrameLowering(const X86Subtarget 
+@@ -57,6 +58,7 @@ X86FrameLowering::X86FrameLowering(const X86Subtarget 
    // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit.
    Uses64BitFramePtr = STI.isTarget64BitLP64() || STI.isTargetNaCl64();
    StackPtr = TRI->getStackRegister();
@@ -26,7 +26,7 @@ Index: llvm/lib/Target/X86/X86FrameLower
  }
  
  bool X86FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
-@@ -101,7 +103,8 @@ bool X86FrameLowering::hasFP(const MachineFunction &MF
+@@ -102,7 +104,8 @@ bool X86FrameLowering::hasFP(const MachineFunction &MF
            MF.getInfo<X86MachineFunctionInfo>()->hasPreallocatedCall() ||
            MF.callsUnwindInit() || MF.hasEHFunclets() || MF.callsEHReturn() ||
            MFI.hasStackMap() || MFI.hasPatchPoint() ||
@@ -35,8 +35,8 @@ Index: llvm/lib/Target/X86/X86FrameLower
 +          SaveArgs);
  }
  
- static unsigned getSUBriOpcode(bool IsLP64, int64_t Imm) {
-@@ -1367,6 +1370,24 @@ void X86FrameLowering::BuildStackAlignAND(MachineBasic
+ static unsigned getSUBriOpcode(bool IsLP64) {
+@@ -1397,6 +1400,24 @@ void X86FrameLowering::BuildStackAlignAND(MachineBasic
    }
  }
  
@@ -49,19 +49,19 @@ Index: llvm/lib/Target/X86/X86FrameLower
 +    static const MCPhysReg GPR64ArgRegsWin64[] = {
 +      X86::RCX, X86::RDX, X86::R8,  X86::R9
 +    };
-+    return makeArrayRef(std::begin(GPR64ArgRegsWin64), 
std::end(GPR64ArgRegsWin64));
++    return ArrayRef(std::begin(GPR64ArgRegsWin64), 
std::end(GPR64ArgRegsWin64));
 +  }
 +
 +  static const MCPhysReg GPR64ArgRegs64Bit[] = {
 +    X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9
 +  };
-+  return makeArrayRef(std::begin(GPR64ArgRegs64Bit), 
std::end(GPR64ArgRegs64Bit));
++  return ArrayRef(std::begin(GPR64ArgRegs64Bit), std::end(GPR64ArgRegs64Bit));
 +}
 +
- bool X86FrameLowering::has128ByteRedZone(const MachineFunction& MF) const {
+ bool X86FrameLowering::has128ByteRedZone(const MachineFunction &MF) const {
    // x86-64 (non Win64) has a 128 byte red zone which is guaranteed not to be
    // clobbered by any interrupt handler.
-@@ -1730,6 +1751,43 @@ void X86FrameLowering::emitPrologue(MachineFunction &M
+@@ -1796,6 +1817,43 @@ void X86FrameLowering::emitPrologue(MachineFunction &M
                .addReg(StackPtr)
                .setMIFlag(MachineInstr::FrameSetup);
  
@@ -103,37 +103,45 @@ Index: llvm/lib/Target/X86/X86FrameLower
 +      }
 +
          if (NeedsDwarfCFI) {
-           // Mark effective beginning of when frame pointer becomes valid.
-           // Define the current CFA to use the EBP/RBP register.
-@@ -2235,10 +2293,17 @@ void X86FrameLowering::emitEpilogue(MachineFunction &M
-       int Offset = 16 + mergeSPUpdates(MBB, MBBI, true);
-       emitSPUpdate(MBB, MBBI, DL, Offset, /*InEpilogue*/true);
+           if (ArgBaseReg.isValid()) {
+             SmallString<64> CfaExpr;
+@@ -2370,11 +2428,23 @@ void X86FrameLowering::emitEpilogue(MachineFunction &M
+       emitSPUpdate(MBB, MBBI, DL, Offset, /*InEpilogue*/ true);
      }
--    // Pop EBP.
--    BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::POP64r : X86::POP32r),
+     // Pop EBP.
+-    BuildMI(MBB, MBBI, DL,
+-            TII.get(getPOPOpcode(MF.getSubtarget<X86Subtarget>())),
+-            MachineFramePtr)
++//    BuildMI(MBB, MBBI, DL,
++//            TII.get(getPOPOpcode(MF.getSubtarget<X86Subtarget>())),
++//            MachineFramePtr)
++//        .setMIFlag(MachineInstr::FrameDestroy);
 +
 +    if (X86FI->getSaveArgSize()) {
 +      // LEAVE is effectively mov rbp,rsp; pop rbp
 +      BuildMI(MBB, MBBI, DL, TII.get(X86::LEAVE64))
-+        .setMIFlag(MachineInstr::FrameDestroy);
+         .setMIFlag(MachineInstr::FrameDestroy);
 +    } else {
 +      // Pop EBP.
 +      BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::POP64r : X86::POP32r),
-             MachineFramePtr)
-         .setMIFlag(MachineInstr::FrameDestroy);
++             MachineFramePtr)
++         .setMIFlag(MachineInstr::FrameDestroy);
 +    }
  
++
      // We need to reset FP to its untagged state on return. Bit 60 is 
currently
      // used to show the presence of an extended frame.
-@@ -2277,6 +2342,7 @@ void X86FrameLowering::emitEpilogue(MachineFunction &M
-     if (Opc != X86::DBG_VALUE && !PI->isTerminator()) {
-       if ((Opc != X86::POP32r || !PI->getFlag(MachineInstr::FrameDestroy)) &&
-           (Opc != X86::POP64r || !PI->getFlag(MachineInstr::FrameDestroy)) &&
-+          (Opc != X86::LEAVE64 || !PI->getFlag(MachineInstr::FrameDestroy)) &&
-           (Opc != X86::BTR64ri8 || !PI->getFlag(MachineInstr::FrameDestroy)) 
&&
-           (Opc != X86::ADD64ri8 || !PI->getFlag(MachineInstr::FrameDestroy)))
+     if (X86FI->hasSwiftAsyncContext()) {
+@@ -2414,7 +2484,7 @@ void X86FrameLowering::emitEpilogue(MachineFunction &M
+       if (!PI->getFlag(MachineInstr::FrameDestroy) ||
+           (Opc != X86::POP32r && Opc != X86::POP64r && Opc != X86::BTR64ri8 &&
+            Opc != X86::ADD64ri32 && Opc != X86::POPP64r && Opc != X86::POP2 &&
+-           Opc != X86::POP2P && Opc != X86::LEA64r))
++           Opc != X86::POP2P && Opc != X86::LEA64r && Opc != X86::LEAVE64))
          break;
-@@ -2451,6 +2517,9 @@ StackOffset X86FrameLowering::getFrameIndexReference(c
+       FirstCSPop = PI;
+     }
+@@ -2601,6 +2671,9 @@ StackOffset X86FrameLowering::getFrameIndexReference(c
             "FPDelta isn't aligned per the Win64 ABI!");
    }
  
@@ -143,7 +151,7 @@ Index: llvm/lib/Target/X86/X86FrameLower
    if (FrameReg == TRI->getFramePtr()) {
      // Skip saved EBP/RBP
      Offset += SlotSize;
-@@ -3870,6 +3939,10 @@ void X86FrameLowering::adjustFrameForMsvcCxxEh(Machine
+@@ -4143,6 +4216,10 @@ void X86FrameLowering::adjustFrameForMsvcCxxEh(Machine
    addFrameReference(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mi32)),
                      UnwindHelpFI)
        .addImm(-2);
Index: patches/patch-llvm_lib_Target_X86_X86MCInstLower_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_X86_X86MCInstLower_cpp,v
diff -u -p -r1.1 patch-llvm_lib_Target_X86_X86MCInstLower_cpp
--- patches/patch-llvm_lib_Target_X86_X86MCInstLower_cpp        27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_X86_X86MCInstLower_cpp        11 Dec 2024 
06:47:12 -0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/Target/X86/X86MCInstLower.cpp
 --- llvm/lib/Target/X86/X86MCInstLower.cpp.orig
 +++ llvm/lib/Target/X86/X86MCInstLower.cpp
-@@ -2694,6 +2694,50 @@ void X86AsmPrinter::emitInstruction(const MachineInstr
+@@ -2209,6 +2209,50 @@ void X86AsmPrinter::emitInstruction(const MachineInstr
          MCInstBuilder(X86::MOV64rr).addReg(X86::R10).addReg(X86::RAX));
      return;
  
@@ -52,7 +52,7 @@ Index: llvm/lib/Target/X86/X86MCInstLowe
    case X86::SEH_PushReg:
    case X86::SEH_SaveReg:
    case X86::SEH_SaveXMM:
-@@ -2756,4 +2800,10 @@ void X86AsmPrinter::emitInstruction(const MachineInstr
+@@ -2272,4 +2316,10 @@ void X86AsmPrinter::emitInstruction(const MachineInstr
    }
  
    EmitAndCountInstruction(TmpInst);
Index: patches/patch-llvm_lib_Target_X86_X86MachineFunctionInfo_h
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_X86_X86MachineFunctionInfo_h,v
diff -u -p -r1.1 patch-llvm_lib_Target_X86_X86MachineFunctionInfo_h
--- patches/patch-llvm_lib_Target_X86_X86MachineFunctionInfo_h  27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_X86_X86MachineFunctionInfo_h  11 Dec 2024 
06:47:12 -0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/Target/X86/X86MachineFunctionInfo.h
 --- llvm/lib/Target/X86/X86MachineFunctionInfo.h.orig
 +++ llvm/lib/Target/X86/X86MachineFunctionInfo.h
-@@ -45,6 +45,9 @@ class X86MachineFunctionInfo : public MachineFunctionI
+@@ -46,6 +46,9 @@ class X86MachineFunctionInfo : public MachineFunctionI
    /// stack frame in bytes.
    unsigned CalleeSavedFrameSize = 0;
  
@@ -11,9 +11,9 @@ Index: llvm/lib/Target/X86/X86MachineFun
    /// BytesToPopOnReturn - Number of bytes function pops on return (in 
addition
    /// to the space used by the return address).
    /// Used on windows platform for stdcall & fastcall name decoration
-@@ -157,6 +160,9 @@ class X86MachineFunctionInfo : public MachineFunctionI
- 
-   unsigned getCalleeSavedFrameSize() const { return CalleeSavedFrameSize; }
+@@ -176,6 +179,9 @@ class X86MachineFunctionInfo : public MachineFunctionI
+     return CalleeSavedFrameSize + 8 * padForPush2Pop2();
+   }
    void setCalleeSavedFrameSize(unsigned bytes) { CalleeSavedFrameSize = 
bytes; }
 +
 +  unsigned getSaveArgSize() const { return SaveArgSize; }
Index: patches/patch-llvm_lib_Target_X86_X86RegisterInfo_td
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_X86_X86RegisterInfo_td,v
diff -u -p -r1.1 patch-llvm_lib_Target_X86_X86RegisterInfo_td
--- patches/patch-llvm_lib_Target_X86_X86RegisterInfo_td        27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_X86_X86RegisterInfo_td        11 Dec 2024 
06:47:12 -0000
@@ -1,23 +1,25 @@
 Index: llvm/lib/Target/X86/X86RegisterInfo.td
 --- llvm/lib/Target/X86/X86RegisterInfo.td.orig
 +++ llvm/lib/Target/X86/X86RegisterInfo.td
-@@ -415,8 +415,8 @@ def GRH16 : RegisterClass<"X86", [i16], 16,
-                                R15WH)>;
- 
+@@ -572,10 +572,10 @@ def GRH16 : RegisterClass<"X86", [i16], 16,
+                          R17WH, R18WH, R19WH, R20WH, R21WH, R22WH, R23WH, 
R24WH,
+                          R25WH, R26WH, R27WH, R28WH, R29WH, R30WH, R31WH)>;
  def GR32 : RegisterClass<"X86", [i32], 32,
--                         (add EAX, ECX, EDX, ESI, EDI, EBX, EBP, ESP,
--                              R8D, R9D, R10D, R11D, R14D, R15D, R12D, R13D)>;
-+                         (add EAX, ECX, EDX, ESI, EDI,
-+                              R8D, R9D, R10D, R11D, R14D, R15D, R12D, R13D, 
EBX, EBP, ESP)>;
+-                         (add EAX, ECX, EDX, ESI, EDI, EBX, EBP, ESP, R8D, 
R9D,
++                         (add EAX, ECX, EDX, ESI, EDI, R8D, R9D,
+                               R10D, R11D, R16D, R17D, R18D, R19D, R20D, R21D, 
R22D,
+                               R23D, R24D, R25D, R26D, R27D, R28D, R29D, R30D, 
R31D,
+-                              R14D, R15D, R12D, R13D)>;
++                              R14D, R15D, R12D, R13D, EBX, EBP, ESP)>;
  
  // GR64 - 64-bit GPRs. This oddly includes RIP, which isn't accurate, since
  // RIP isn't really a register and it can't be used anywhere except in an
-@@ -425,7 +425,7 @@ def GR32 : RegisterClass<"X86", [i32], 32,
- // tests because of the inclusion of RIP in this register class.
+@@ -585,7 +585,7 @@ def GR32 : RegisterClass<"X86", [i32], 32,
  def GR64 : RegisterClass<"X86", [i64], 64,
-                          (add RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11,
--                              RBX, R14, R15, R12, R13, RBP, RSP, RIP)>;
-+                              R14, R15, R12, R13, RBX, RBP, RSP, RIP)>;
+                     (add RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11, R16, R17,
+                          R18, R19, R20, R21, R22, R23, R24, R25, R26, R27, 
R28, R29,
+-                         R30, R31, RBX, R14, R15, R12, R13, RBP, RSP, RIP)>;
++                         R30, R31, R14, R15, R12, R13, RBX, RBP, RSP, RIP)>;
  
  // GR64PLTSafe - 64-bit GPRs without R10, R11, RSP and RIP. Could be used when
  // emitting code for intrinsics, which use implict input registers.
Index: patches/patch-llvm_lib_Target_X86_X86RetClean_cpp
===================================================================
RCS file: patches/patch-llvm_lib_Target_X86_X86RetClean_cpp
diff -N patches/patch-llvm_lib_Target_X86_X86RetClean_cpp
--- /dev/null   1 Jan 1970 00:00:00 -0000
+++ patches/patch-llvm_lib_Target_X86_X86RetClean_cpp   11 Dec 2024 06:47:12 
-0000
@@ -0,0 +1,123 @@
+Index: llvm/lib/Target/X86/X86RetClean.cpp
+--- llvm/lib/Target/X86/X86RetClean.cpp.orig
++++ llvm/lib/Target/X86/X86RetClean.cpp
+@@ -0,0 +1,119 @@
++//===-- X86RetClean.cpp - Clean Retaddr off stack upon function return 
----===//
++//
++//                     The LLVM Compiler Infrastructure
++//
++// This file is distributed under the University of Illinois Open Source
++// License. See LICENSE.TXT for details.
++//
++//===----------------------------------------------------------------------===//
++/// \file
++/// This file defines a function pass that clears the ret-address from
++/// the top of the stack, immediately upon return to the caller, the goal
++/// is remove this subtle but powerful info-leak which hints at the
++/// address space location of the lower level libraries.
++///
++//===----------------------------------------------------------------------===//
++
++#include "X86.h"
++#include "X86InstrBuilder.h"
++#include "X86InstrInfo.h"
++#include "X86MachineFunctionInfo.h"
++#include "X86Subtarget.h"
++#include "X86TargetMachine.h"
++#include "llvm/CodeGen/MachineFunction.h"
++#include "llvm/CodeGen/MachineFunctionPass.h"
++#include "llvm/CodeGen/MachineInstrBuilder.h"
++#include "llvm/CodeGen/MachineRegisterInfo.h"
++#include "llvm/CodeGen/Passes.h"
++#include "llvm/MC/MCAsmInfo.h"
++#include "llvm/MC/MCSymbol.h"
++#include "llvm/Support/Debug.h"
++#include "llvm/Support/raw_ostream.h"
++using namespace llvm;
++
++#define RETCLEAN_DESC "X86 Ret Clean"
++#define RETCLEAN_NAME "x86-ret-clean"
++
++#define DEBUG_TYPE RETCLEAN_NAME
++
++// Toggle with cc1 option: -mllvm -x86-ret-clean=<true|false>
++static cl::opt<bool> RetClean(
++    "x86-ret-clean", cl::Hidden,
++    cl::desc("clean return address off stack after call"),
++    cl::init(false));
++
++namespace {
++class RetCleanPass : public MachineFunctionPass {
++
++public:
++  static char ID;
++
++  StringRef getPassName() const override { return RETCLEAN_DESC; }
++
++  RetCleanPass()
++      : MachineFunctionPass(ID) {}
++
++  /// Loop over all the instructions and replace ret with ret+clean
++  bool runOnMachineFunction(MachineFunction &MF) override;
++
++  MachineFunctionProperties getRequiredProperties() const override {
++    return MachineFunctionProperties().set(
++        MachineFunctionProperties::Property::NoVRegs);
++  }
++
++private:
++  bool fixupInstruction(MachineFunction &MF, MachineBasicBlock &MBB,
++                        MachineInstr &MI);
++};
++char RetCleanPass::ID = 0;
++} // namespace
++
++FunctionPass *llvm::createX86RetCleanPass() {
++  return new RetCleanPass();
++}
++
++bool RetCleanPass::fixupInstruction(MachineFunction &MF,
++                               MachineBasicBlock &MBB,
++                               MachineInstr &MI) {
++
++  const X86InstrInfo *TII = MF.getSubtarget<X86Subtarget>().getInstrInfo();
++  bool Is64Bit = MF.getTarget().getTargetTriple().getArch() == Triple::x86_64;
++  unsigned Opc = Is64Bit ? X86::MOV64mi32 : X86::MOV32mi;
++  unsigned Offset = Is64Bit ? -8 : -4;
++  Register SPReg = Is64Bit ? X86::RSP : X86::ESP;
++
++  // add "movq $0, -8(%rsp)" (or similar) in caller, to clear the
++  // ret-addr info-leak off the stack
++  addRegOffset(BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(Opc)),
++    SPReg, false, Offset)
++    .addImm(0);
++  return true;
++}
++
++bool RetCleanPass::runOnMachineFunction(MachineFunction &MF) {
++  if (!RetClean)
++    return false;
++
++  bool modified = false;
++
++  // If a setjmp-like function is called by this function, we should not clean
++  if (MF.exposesReturnsTwice())
++    return false;
++
++  for (auto &MBB : MF) {
++    std::vector<MachineInstr*> fixups;
++    bool foundcall = false;
++
++    for (auto &MI : MBB) {
++      if (MI.isCall()) {
++        foundcall = true;     // queue the insert before the next MI
++      } else if (foundcall) {
++         fixups.push_back(&MI);
++         foundcall = false;
++      }
++    }
++    for (auto *fixup : fixups)
++      modified |= fixupInstruction(MF, MBB, *fixup);
++  }
++  return modified;
++}
Index: patches/patch-llvm_lib_Target_X86_X86Subtarget_h
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_X86_X86Subtarget_h,v
diff -u -p -r1.1 patch-llvm_lib_Target_X86_X86Subtarget_h
--- patches/patch-llvm_lib_Target_X86_X86Subtarget_h    27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-llvm_lib_Target_X86_X86Subtarget_h    11 Dec 2024 06:47:12 
-0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/Target/X86/X86Subtarget.h
 --- llvm/lib/Target/X86/X86Subtarget.h.orig
 +++ llvm/lib/Target/X86/X86Subtarget.h
-@@ -139,6 +139,8 @@ class X86Subtarget final : public X86GenSubtargetInfo 
+@@ -140,6 +140,8 @@ class X86Subtarget final : public X86GenSubtargetInfo 
      return &getInstrInfo()->getRegisterInfo();
    }
  
@@ -10,7 +10,7 @@ Index: llvm/lib/Target/X86/X86Subtarget.
    unsigned getTileConfigSize() const { return 64; }
    Align getTileConfigAlignment() const { return TileConfigAlignment; }
  
-@@ -279,6 +281,7 @@ class X86Subtarget final : public X86GenSubtargetInfo 
+@@ -293,6 +295,7 @@ class X86Subtarget final : public X86GenSubtargetInfo 
  
    bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
    bool isTargetFreeBSD() const { return TargetTriple.isOSFreeBSD(); }
Index: patches/patch-llvm_lib_Target_X86_X86TargetMachine_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_X86_X86TargetMachine_cpp,v
diff -u -p -r1.1 patch-llvm_lib_Target_X86_X86TargetMachine_cpp
--- patches/patch-llvm_lib_Target_X86_X86TargetMachine_cpp      27 May 2024 
18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Target_X86_X86TargetMachine_cpp      11 Dec 2024 
06:47:12 -0000
@@ -1,11 +1,20 @@
 Index: llvm/lib/Target/X86/X86TargetMachine.cpp
 --- llvm/lib/Target/X86/X86TargetMachine.cpp.orig
 +++ llvm/lib/Target/X86/X86TargetMachine.cpp
-@@ -575,6 +575,7 @@ void X86PassConfig::addPreEmitPass() {
-   addPass(createX86EvexToVexInsts());
+@@ -581,6 +581,7 @@ void X86PassConfig::addPreEmitPass() {
+   addPass(createX86CompressEVEXPass());
    addPass(createX86DiscriminateMemOpsPass());
    addPass(createX86InsertPrefetchPass());
 +  addPass(createX86FixupGadgetsPass());
    addPass(createX86InsertX87waitPass());
  }
  
+@@ -600,6 +601,8 @@ void X86PassConfig::addPreEmitPass2() {
+   addPass(createX86SpeculativeExecutionSideEffectSuppression());
+   addPass(createX86IndirectThunksPass());
+   addPass(createX86ReturnThunksPass());
++
++  addPass(createX86RetCleanPass());
+ 
+   // Insert extra int3 instructions after trailing call instructions to avoid
+   // issues in the unwinder.
Index: patches/patch-llvm_lib_Target_X86_X86_h
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_X86_X86_h,v
diff -u -p -r1.1 patch-llvm_lib_Target_X86_X86_h
--- patches/patch-llvm_lib_Target_X86_X86_h     27 May 2024 18:14:08 -0000      
1.1
+++ patches/patch-llvm_lib_Target_X86_X86_h     11 Dec 2024 06:47:12 -0000
@@ -1,14 +1,18 @@
 Index: llvm/lib/Target/X86/X86.h
 --- llvm/lib/Target/X86/X86.h.orig
 +++ llvm/lib/Target/X86/X86.h
-@@ -128,6 +128,10 @@ FunctionPass *createX86FixupBWInsts();
- /// to another, when profitable.
- FunctionPass *createX86DomainReassignmentPass();
+@@ -121,6 +121,14 @@ FunctionPass *createX86ExpandPseudoPass();
+ /// This pass converts X86 cmov instructions into branch when profitable.
+ FunctionPass *createX86CmovConverterPass();
  
 +/// Return a Machine Function pass that attempts to replace
 +/// ROP friendly instructions with alternatives.
 +FunctionPass *createX86FixupGadgetsPass();
 +
- /// This pass replaces EVEX encoded of AVX-512 instructiosn by VEX
- /// encoding when possible in order to reduce code size.
- FunctionPass *createX86EvexToVexInsts();
++/// Return a Machine Function pass that attempts to replace
++/// RET instructions with a cleaning sequence
++FunctionPass *createX86RetCleanPass();
++
+ /// Return a Machine IR pass that selectively replaces
+ /// certain byte and word instructions by equivalent 32 bit instructions,
+ /// in order to eliminate partial register usage, false dependences on
Index: patches/patch-llvm_lib_Target_X86_X86_td
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Target_X86_X86_td,v
diff -u -p -r1.1 patch-llvm_lib_Target_X86_X86_td
--- patches/patch-llvm_lib_Target_X86_X86_td    27 May 2024 18:14:08 -0000      
1.1
+++ patches/patch-llvm_lib_Target_X86_X86_td    11 Dec 2024 06:47:12 -0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/Target/X86/X86.td
 --- llvm/lib/Target/X86/X86.td.orig
 +++ llvm/lib/Target/X86/X86.td
-@@ -491,6 +491,10 @@ def TuningLZCNTFalseDeps : SubtargetFeature<"false-dep
+@@ -534,6 +534,10 @@ def TuningLZCNTFalseDeps : SubtargetFeature<"false-dep
                                       "HasLZCNTFalseDeps", "true",
                                       "LZCNT/TZCNT have a false dependency on 
dest register">;
  
Index: patches/patch-llvm_lib_Transforms_Scalar_LoopIdiomRecognize_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_lib_Transforms_Scalar_LoopIdiomRecognize_cpp,v
diff -u -p -r1.1 patch-llvm_lib_Transforms_Scalar_LoopIdiomRecognize_cpp
--- patches/patch-llvm_lib_Transforms_Scalar_LoopIdiomRecognize_cpp     27 May 
2024 18:14:08 -0000      1.1
+++ patches/patch-llvm_lib_Transforms_Scalar_LoopIdiomRecognize_cpp     11 Dec 
2024 06:47:12 -0000
@@ -1,7 +1,7 @@
 Index: llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
 --- llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp.orig
 +++ llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
-@@ -366,6 +366,8 @@ bool LoopIdiomRecognize::runOnLoop(Loop *L) {
+@@ -293,6 +293,8 @@ bool LoopIdiomRecognize::runOnLoop(Loop *L) {
    StringRef Name = L->getHeader()->getParent()->getName();
    if (Name == "memset" || Name == "memcpy")
      return false;
Index: patches/patch-llvm_tools_llvm-ar_llvm-ar_cpp
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_tools_llvm-ar_llvm-ar_cpp,v
diff -u -p -r1.1 patch-llvm_tools_llvm-ar_llvm-ar_cpp
--- patches/patch-llvm_tools_llvm-ar_llvm-ar_cpp        27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-llvm_tools_llvm-ar_llvm-ar_cpp        11 Dec 2024 06:47:12 
-0000
@@ -1,10 +1,10 @@
 Index: llvm/tools/llvm-ar/llvm-ar.cpp
 --- llvm/tools/llvm-ar/llvm-ar.cpp.orig
 +++ llvm/tools/llvm-ar/llvm-ar.cpp
-@@ -1432,8 +1432,12 @@ static int ranlib_main(int argc, char **argv) {
-         } else if (arg.front() == 'v') {
-           cl::PrintVersionMessage();
-           return 0;
+@@ -1453,8 +1453,12 @@ static int ranlib_main(int argc, char **argv) {
+                  " option not supported on non AIX OS");
+           }
+           break;
 +        } else if (arg.front() == 't') {
 +          // GNU ranlib also supports a -t flag, but does nothing
 +          // because it just returns true without touching the
Index: patches/patch-llvm_tools_llvm-objdump_ELFDump_cpp
===================================================================
RCS file: patches/patch-llvm_tools_llvm-objdump_ELFDump_cpp
diff -N patches/patch-llvm_tools_llvm-objdump_ELFDump_cpp
--- patches/patch-llvm_tools_llvm-objdump_ELFDump_cpp   27 May 2024 18:14:08 
-0000      1.1
+++ /dev/null   1 Jan 1970 00:00:00 -0000
@@ -1,18 +0,0 @@
-Index: llvm/tools/llvm-objdump/ELFDump.cpp
---- llvm/tools/llvm-objdump/ELFDump.cpp.orig
-+++ llvm/tools/llvm-objdump/ELFDump.cpp
-@@ -253,8 +253,14 @@ static void printProgramHeaders(const ELFFile<ELFT> &O
-     case ELF::PT_OPENBSD_MUTABLE:
-       outs() << "OPENBSD_MUTABLE ";
-       break;
-+    case ELF::PT_OPENBSD_NOBTCFI:
-+      outs() << "OPENBSD_NOBTCFI ";
-+      break;
-     case ELF::PT_OPENBSD_RANDOMIZE:
-       outs() << "OPENBSD_RANDOMIZE ";
-+      break;
-+    case ELF::PT_OPENBSD_SYSCALLS:
-+      outs() << "OPENBSD_SYSCALLS ";
-       break;
-     case ELF::PT_OPENBSD_WXNEEDED:
-       outs() << "OPENBSD_WXNEEDED ";
Index: patches/patch-llvm_tools_llvm-readobj_ELFDumper_cpp
===================================================================
RCS file: patches/patch-llvm_tools_llvm-readobj_ELFDumper_cpp
diff -N patches/patch-llvm_tools_llvm-readobj_ELFDumper_cpp
--- patches/patch-llvm_tools_llvm-readobj_ELFDumper_cpp 27 May 2024 18:14:08 
-0000      1.1
+++ /dev/null   1 Jan 1970 00:00:00 -0000
@@ -1,13 +0,0 @@
-Index: llvm/tools/llvm-readobj/ELFDumper.cpp
---- llvm/tools/llvm-readobj/ELFDumper.cpp.orig
-+++ llvm/tools/llvm-readobj/ELFDumper.cpp
-@@ -1411,7 +1411,9 @@ static StringRef segmentTypeToString(unsigned Arch, un
- 
-     LLVM_READOBJ_ENUM_CASE(ELF, PT_OPENBSD_MUTABLE);
-     LLVM_READOBJ_ENUM_CASE(ELF, PT_OPENBSD_RANDOMIZE);
-+    LLVM_READOBJ_ENUM_CASE(ELF, PT_OPENBSD_SYSCALLS);
-     LLVM_READOBJ_ENUM_CASE(ELF, PT_OPENBSD_WXNEEDED);
-+    LLVM_READOBJ_ENUM_CASE(ELF, PT_OPENBSD_NOBTCFI);
-     LLVM_READOBJ_ENUM_CASE(ELF, PT_OPENBSD_BOOTDATA);
-   default:
-     return "";
Index: patches/patch-llvm_tools_llvm-shlib_CMakeLists_txt
===================================================================
RCS file: 
/cvs/ports/devel/clang-tools-extra/patches/patch-llvm_tools_llvm-shlib_CMakeLists_txt,v
diff -u -p -r1.1 patch-llvm_tools_llvm-shlib_CMakeLists_txt
--- patches/patch-llvm_tools_llvm-shlib_CMakeLists_txt  27 May 2024 18:14:08 
-0000      1.1
+++ patches/patch-llvm_tools_llvm-shlib_CMakeLists_txt  11 Dec 2024 06:47:12 
-0000
@@ -3,12 +3,20 @@
 Index: llvm/tools/llvm-shlib/CMakeLists.txt
 --- llvm/tools/llvm-shlib/CMakeLists.txt.orig
 +++ llvm/tools/llvm-shlib/CMakeLists.txt
-@@ -51,7 +51,7 @@ if(LLVM_BUILD_LLVM_DYLIB)
+@@ -39,6 +39,7 @@ if(LLVM_BUILD_LLVM_DYLIB)
+     add_llvm_library(LLVM SHARED DISABLE_LLVM_LINK_LLVM_DYLIB OUTPUT_NAME 
LLVM ${INSTALL_WITH_TOOLCHAIN} ${SOURCES})
+     # Add symlink for backwards compatibility with old library name
+     
llvm_install_library_symlink(LLVM-${LLVM_VERSION_MAJOR}${LLVM_VERSION_SUFFIX} 
$<TARGET_FILE_NAME:LLVM> SHARED FULL_DEST COMPONENT LLVM)
++    llvm_install_library_symlink(LLVM${LLVM_VERSION_SUFFIX} 
$<TARGET_FILE_NAME:LLVM> SHARED FULL_DEST COMPONENT LLVM)
+   endif()
+ 
+   list(REMOVE_DUPLICATES LIB_NAMES)
+@@ -55,7 +56,7 @@ if(LLVM_BUILD_LLVM_DYLIB)
        # Solaris ld does not accept global: *; so there is no way to version 
*all* global symbols
        set(LIB_NAMES 
-Wl,--version-script,${LLVM_LIBRARY_DIR}/tools/llvm-shlib/simple_version_script.map
 ${LIB_NAMES})
      endif()
--    if (NOT MINGW)
-+    if (NOT MINGW AND ${OPENBSD_LD_IS_LLD})
+-    if (NOT MINGW AND NOT LLVM_LINKER_IS_SOLARISLD_ILLUMOS)
++    if (NOT MINGW AND NOT LLVM_LINKER_IS_SOLARISLD_ILLUMOS AND 
${OPENBSD_LD_IS_LLD})
        # Optimize function calls for default visibility definitions to avoid 
PLT and
        # reduce dynamic relocations.
        # Note: for -fno-pic default, the address of a function may be 
different from
Index: patches/patch-llvm_unittests_Support_MemoryTest_cpp
===================================================================
RCS file: patches/patch-llvm_unittests_Support_MemoryTest_cpp
diff -N patches/patch-llvm_unittests_Support_MemoryTest_cpp
--- /dev/null   1 Jan 1970 00:00:00 -0000
+++ patches/patch-llvm_unittests_Support_MemoryTest_cpp 11 Dec 2024 06:47:12 
-0000
@@ -0,0 +1,12 @@
+Index: llvm/unittests/Support/MemoryTest.cpp
+--- llvm/unittests/Support/MemoryTest.cpp.orig
++++ llvm/unittests/Support/MemoryTest.cpp
+@@ -40,7 +40,7 @@ bool IsMPROTECT() {
+     err(EXIT_FAILURE, "sysctl");
+ 
+   return !!(paxflags & CTL_PROC_PAXFLAGS_MPROTECT);
+-#elif defined(__APPLE__) && defined(__aarch64__)
++#elif (defined(__APPLE__) && defined(__aarch64__)) || defined(__OpenBSD__)
+   return true;
+ #else
+   return false;

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