On 2021/11/23 09:33, Tracey Emery wrote:
> On Sat, Nov 20, 2021 at 09:39:32PM -0700, [email protected] wrote:
> > http://build-failures.rhaalovely.net/sparc64/2021-11-18/cad/dxf2gcode.log
>
> For sparc64, the dxf2gcode failure is due to sipSetBool not being
> defined in the build for py3-pyqt5_sip. jca kindly explained that the
> code needs at least C99 for the build.
>
> The following fixed the dxf2gcode build on sparc64.
>
> ok?
>
> --
>
> Tracey Emery
>
> Index: Makefile
> ===================================================================
> RCS file: /cvs/ports/x11/py-sip-qt5/Makefile,v
> retrieving revision 1.7
> diff -u -p -u -r1.7 Makefile
> --- Makefile 2 Nov 2021 00:02:59 -0000 1.7
> +++ Makefile 23 Nov 2021 16:31:47 -0000
> @@ -6,7 +6,7 @@ MODPY_EGG_VERSION= 12.9.0
>
> DISTNAME= PyQt5_sip-${MODPY_EGG_VERSION}
> PKGNAME= py-${DISTNAME:L}
> -REVISION= 0
> +REVISION= 1
>
> CATEGORIES= x11
>
> @@ -14,6 +14,11 @@ HOMEPAGE= https://www.riverbankcomputing
>
> # SIP license (Python-like) or GPLv2/v3
> PERMIT_PACKAGE= Yes
> +
> +WANTLIB += pthread
> +
> +# for sparc64 build requires at least C99
> +COMPILER= base-clang ports-gcc
if it's just C then please set COMPILER_LANGS
(if it's C++ then I'd probably expect something else in WANTLIB)
> MODULES= lang/python
> FLAVOR= python3
> Index: pkg/PLIST
> ===================================================================
> RCS file: /cvs/ports/x11/py-sip-qt5/pkg/PLIST,v
> retrieving revision 1.4
> diff -u -p -u -r1.4 PLIST
> --- pkg/PLIST 14 Feb 2021 14:24:20 -0000 1.4
> +++ pkg/PLIST 23 Nov 2021 16:31:47 -0000
> @@ -1,5 +1,5 @@
> @comment $OpenBSD: PLIST,v 1.4 2021/02/14 14:24:20 sthen Exp $
> -@conflict py3-sip-<5.5.0v0
> +@conflict ${MODPY_PY_PREFIX}sip-<5.5.0v0
please leave that one as-is
> lib/python${MODPY_VERSION}/site-packages/PyQt5/
> @so
> lib/python${MODPY_VERSION}/site-packages/PyQt5/sip.${MODPY_PYC_MAGIC_TAG}so
>
> lib/python${MODPY_VERSION}/site-packages/PyQt5_sip-${MODPY_EGG_VERSION}-py${MODPY_VERSION}.egg-info/
>