On Mon, Jun 29, 2015 at 10:32 PM, Andres Freund <and...@anarazel.de> wrote: > On 2015-06-29 22:11:33 -0400, Robert Haas wrote: >> On Mon, Jun 29, 2015 at 6:11 AM, Andres Freund <and...@anarazel.de> wrote: >> > On 2015-06-29 00:42:53 -0400, Tom Lane wrote: >> >> #define S_UNLOCK(lock) \ >> >> do { _Asm_sched_fence(); (*(lock)) = 0; } while (0) >> > >> > Robert, how did you choose that? Isn't _Asm_sched_fence just a compiler >> > barrier? Shouldn't this be a _Asm_mf()? >> >> The point of the commit was to make spinlocks act as compiler barriers >> as well as CPU barriers. So I was just looking to add a compiler >> barrier to what was already there. > > You removed a volatile at the same time, and volatile on IA64 has > acquire/release semantics.
Can you explain what you mean by volatile having acquire/release semantics? I don't see how volatile can create a CPU barrier, but I'm guessing that it somehow can and that you're about to enlighten me. -- Robert Haas EnterpriseDB: http://www.enterprisedb.com The Enterprise PostgreSQL Company -- Sent via pgsql-hackers mailing list (pgsql-hackers@postgresql.org) To make changes to your subscription: http://www.postgresql.org/mailpref/pgsql-hackers