On Tue, Jul 12, 2022 at 7:24 AM Tom Lane <t...@sss.pgh.pa.us> wrote: > Thomas Munro <thomas.mu...@gmail.com> writes: > > It's funny to think that you probably could run modern PostgreSQL on > > the Sun 3 boxes the project started on in 1986 (based on clues from > > the papers in our history section) if you put NetBSD on them, but > > you'd probably need to cross compile due to lack of RAM. > > Yeah. I'm wondering if that sh3el package was cross-compiled, > and if so whether it was just part of a mass package build rather > than something somebody was specifically interested in. You'd > have to be a glutton for pain to want to do actual work with PG > on the kind of SH3 hardware that seems to be available.
/me pictures Stark wheeling a real Sun 3 into a conference room Yeah, we can always consider putting SuperH back if someone showed up to maintain/test it. That seems unlikely, but apparently there's an open source silicon project based on this ISA, so maybe a fast one isn't impossible... Here's a patch to remove all of these. I didn't originally suggest that because of some kind of (mostly vicarious) nostalgia. I wonder if we should allow ourselves a paragraph where we remember these systems. I personally think it's one of the amazing things about this project. Here's what I came up with, but I'm sure there are more.
From 9c20f8b70632a6a79333c835bcf3f4c7d427f1cf Mon Sep 17 00:00:00 2001 From: Thomas Munro <thomas.mu...@gmail.com> Date: Tue, 12 Jul 2022 08:04:46 +1200 Subject: [PATCH 1/2] Further tidy-up for supported CPUs. Further to commit 92d70b77, let's drop the code we carry for the following untested architectures: M68K, M88K, M32R, SuperH. We have no idea if anything actually works there, and surely as vintage hardware and microcontrollers they would be underpowered for any modern purpose. We could always consider re-adding SuperH based on modern evidence of usage and build farm support, if someone shows up to provide it. While here, SPARC is usually written in all caps. Discussion: https://postgr.es/m/959917.1657522169%40sss.pgh.pa.us --- doc/src/sgml/installation.sgml | 5 +- src/backend/storage/lmgr/s_lock.c | 65 ------------------- src/include/storage/s_lock.h | 102 ------------------------------ 3 files changed, 2 insertions(+), 170 deletions(-) diff --git a/doc/src/sgml/installation.sgml b/doc/src/sgml/installation.sgml index dec13eaa93..381b728e08 100644 --- a/doc/src/sgml/installation.sgml +++ b/doc/src/sgml/installation.sgml @@ -2125,11 +2125,10 @@ export MANPATH <para> In general, <productname>PostgreSQL</productname> can be expected to work on - these CPU architectures: x86, PowerPC, S/390, Sparc, ARM, MIPS, RISC-V, + these CPU architectures: x86, PowerPC, S/390, SPARC, ARM, MIPS, RISC-V, and PA-RISC, including big-endian, little-endian, 32-bit, and 64-bit variants where applicable. - Code support exists for M68K, M88K, M32R, and SuperH, but these - architectures are not known to have been tested recently. It is often + It is often possible to build on an unsupported CPU type by configuring with <option>--disable-spinlocks</option>, but performance will be poor. </para> diff --git a/src/backend/storage/lmgr/s_lock.c b/src/backend/storage/lmgr/s_lock.c index baea773a02..2a658ff594 100644 --- a/src/backend/storage/lmgr/s_lock.c +++ b/src/backend/storage/lmgr/s_lock.c @@ -220,71 +220,6 @@ update_spins_per_delay(int shared_spins_per_delay) } -/* - * Various TAS implementations that cannot live in s_lock.h as no inline - * definition exists (yet). - * In the future, get rid of tas.[cso] and fold it into this file. - * - * If you change something here, you will likely need to modify s_lock.h too, - * because the definitions for these are split between this file and s_lock.h. - */ - - -#ifdef HAVE_SPINLOCKS /* skip spinlocks if requested */ - - -#if defined(__GNUC__) - -/* - * All the gcc flavors that are not inlined - */ - - -/* - * Note: all the if-tests here probably ought to be testing gcc version - * rather than platform, but I don't have adequate info to know what to - * write. Ideally we'd flush all this in favor of the inline version. - */ -#if defined(__m68k__) && !defined(__linux__) -/* really means: extern int tas(slock_t* **lock); */ -static void -tas_dummy() -{ - __asm__ __volatile__( -#if (defined(__NetBSD__) || defined(__OpenBSD__)) && defined(__ELF__) -/* no underscore for label and % for registers */ - "\ -.global tas \n\ -tas: \n\ - movel %sp@(0x4),%a0 \n\ - tas %a0@ \n\ - beq _success \n\ - moveq #-128,%d0 \n\ - rts \n\ -_success: \n\ - moveq #0,%d0 \n\ - rts \n" -#else - "\ -.global _tas \n\ -_tas: \n\ - movel sp@(0x4),a0 \n\ - tas a0@ \n\ - beq _success \n\ - moveq #-128,d0 \n\ - rts \n\ -_success: \n\ - moveq #0,d0 \n\ - rts \n" -#endif /* (__NetBSD__ || __OpenBSD__) && __ELF__ */ - ); -} -#endif /* __m68k__ && !__linux__ */ -#endif /* not __GNUC__ */ -#endif /* HAVE_SPINLOCKS */ - - - /*****************************************************************************/ #if defined(S_LOCK_TEST) diff --git a/src/include/storage/s_lock.h b/src/include/storage/s_lock.h index 1f5394ef7f..1c9f6f0895 100644 --- a/src/include/storage/s_lock.h +++ b/src/include/storage/s_lock.h @@ -498,56 +498,6 @@ do \ #endif /* powerpc */ -/* Linux Motorola 68k */ -#if (defined(__mc68000__) || defined(__m68k__)) && defined(__linux__) -#define HAS_TEST_AND_SET - -typedef unsigned char slock_t; - -#define TAS(lock) tas(lock) - -static __inline__ int -tas(volatile slock_t *lock) -{ - register int rv; - - __asm__ __volatile__( - " clrl %0 \n" - " tas %1 \n" - " sne %0 \n" -: "=d"(rv), "+m"(*lock) -: /* no inputs */ -: "memory", "cc"); - return rv; -} - -#endif /* (__mc68000__ || __m68k__) && __linux__ */ - - -/* Motorola 88k */ -#if defined(__m88k__) -#define HAS_TEST_AND_SET - -typedef unsigned int slock_t; - -#define TAS(lock) tas(lock) - -static __inline__ int -tas(volatile slock_t *lock) -{ - register slock_t _res = 1; - - __asm__ __volatile__( - " xmem %0, %2, %%r0 \n" -: "+r"(_res), "+m"(*lock) -: "r"(lock) -: "memory"); - return (int) _res; -} - -#endif /* __m88k__ */ - - #if defined(__mips__) && !defined(__sgi) /* non-SGI MIPS */ #define HAS_TEST_AND_SET @@ -619,58 +569,6 @@ do \ #endif /* __mips__ && !__sgi */ -#if defined(__m32r__) && defined(HAVE_SYS_TAS_H) /* Renesas' M32R */ -#define HAS_TEST_AND_SET - -#include <sys/tas.h> - -typedef int slock_t; - -#define TAS(lock) tas(lock) - -#endif /* __m32r__ */ - - -#if defined(__sh__) /* Renesas' SuperH */ -#define HAS_TEST_AND_SET - -typedef unsigned char slock_t; - -#define TAS(lock) tas(lock) - -static __inline__ int -tas(volatile slock_t *lock) -{ - register int _res; - - /* - * This asm is coded as if %0 could be any register, but actually SuperH - * restricts the target of xor-immediate to be R0. That's handled by - * the "z" constraint on _res. - */ - __asm__ __volatile__( - " tas.b @%2 \n" - " movt %0 \n" - " xor #1,%0 \n" -: "=z"(_res), "+m"(*lock) -: "r"(lock) -: "memory", "t"); - return _res; -} - -#endif /* __sh__ */ - - -/* These live in s_lock.c, but only for gcc */ - - -#if defined(__m68k__) && !defined(__linux__) /* non-Linux Motorola 68k */ -#define HAS_TEST_AND_SET - -typedef unsigned char slock_t; -#endif - - #if defined(__hppa) || defined(__hppa__) /* HP PA-RISC */ /* * HP's PA-RISC -- 2.30.2
From aae902f3eba528e937e56cca08dd3f94bf52c221 Mon Sep 17 00:00:00 2001 From: Thomas Munro <thomas.mu...@gmail.com> Date: Tue, 12 Jul 2022 08:14:40 +1200 Subject: [PATCH 2/2] Doc: Acknowledge historically supported CPUs and OSes. PostgreSQL/POSTGRES has run on a huge range of CPUs and OSes. As we're dropping some of the earliest systems the project was founded on, let's provide a place to remember them. Discussion: https://postgr.es/m/959917.1657522169%40sss.pgh.pa.us --- doc/src/sgml/installation.sgml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/doc/src/sgml/installation.sgml b/doc/src/sgml/installation.sgml index 381b728e08..2aacc233e6 100644 --- a/doc/src/sgml/installation.sgml +++ b/doc/src/sgml/installation.sgml @@ -2153,6 +2153,14 @@ export MANPATH <email>pgsql-hackers@lists.postgresql.org</email> is the appropriate place to discuss that. </para> + + <para> + Historical versions of <productname>PostgreSQL</productname> or POSTGRES + also ran on CPU architectures including Alpha, Itanium, M32R, M68K, + M88K, NS32K, SuperH, and VAX, and operating systems including 4.3BSD, BEOS, + BSD/OS, DG/UX, Dynix, HP-UX, IRIX, NeXTSTEP, OSF, QNX, SCO, SINIX, Sprite, + SunOS, and ULTRIX. + </para> </sect1> <sect1 id="installation-platform-notes"> -- 2.30.2
