Leo> Can you provide dummy subs for the _offs functions and put in a dummy
Leo> define for the get_base_reg_no macro that returns some valid register
Leo> number.
Andy> I'll try something, but it'll be nearly blind guessing -- I don't know
Andy> anywhere near enough about JIT or about SPARC assembler to actually
Andy> understand what I'm doing, however.
Ok, here's a cargo-cult dummy it-compiles-but-can't-possibly-actually-work
patch. The structure of the jit_emit.h file is hard to fathom -- it gets
included multiple times by multiple files, and different implementations
in the jit/*/ directories handle those multiple includes differently. By
trial and error, I figured out where to put things to at least get it to
build without multiple or missing definitions.
The biggest bulk of this change is whitespace: I have indented the
#-directives that are inside #ifdef/#endif blocks so I could understand
where I was in the file. The parts relevant to this bug report are marked
prominently with XXX as well as the bug number [perl #37819].
This is such a hack that I left in Leo's recent change to simply disable
jit operation on sun4. To actually use this file, you have to configure
with --jitcapable.
diff -r -u parrot-current/jit/sun4/jit_emit.h parrot-andy/jit/sun4/jit_emit.h
--- parrot-current/jit/sun4/jit_emit.h Sun Aug 28 19:15:09 2005
+++ parrot-andy/jit/sun4/jit_emit.h Tue Dec 6 09:29:25 2005
@@ -29,290 +29,290 @@
#if JIT_EMIT
-#define emitm_FP emitm_i(6)
-#define emitm_SP emitm_o(6)
+# define emitm_FP emitm_i(6)
+# define emitm_SP emitm_o(6)
-#define emitm_mask(n, val) ((unsigned)(val) & ((1U << n) - 1))
+# define emitm_mask(n, val) ((unsigned)(val) & ((1U << n) - 1))
-#define emitm_hi30(val) ((unsigned)(val) >> 2)
-#define emitm_hi22(val) ((unsigned)(val) >> 10)
-#define emitm_lo10(val) emitm_mask(10, val)
-#define emitm_simm13(val) emitm_mask(13, val)
+# define emitm_hi30(val) ((unsigned)(val) >> 2)
+# define emitm_hi22(val) ((unsigned)(val) >> 10)
+# define emitm_lo10(val) emitm_mask(10, val)
+# define emitm_simm13(val) emitm_mask(13, val)
-#define emitm_opval(val) ((unsigned)(val) << 30)
-#define emitm_op2val(val) ((unsigned)(val) << 22)
-#define emitm_op3val(val) ((unsigned)(val) << 19)
-#define emitm_rd(val) ((unsigned)(val) << 25)
-#define emitm_rs1(val) ((unsigned)(val) << 14)
+# define emitm_opval(val) ((unsigned)(val) << 30)
+# define emitm_op2val(val) ((unsigned)(val) << 22)
+# define emitm_op3val(val) ((unsigned)(val) << 19)
+# define emitm_rd(val) ((unsigned)(val) << 25)
+# define emitm_rs1(val) ((unsigned)(val) << 14)
-#define emitm_simm13_max 4095
-#define emitm_simm13_min -4096
+# define emitm_simm13_max 4095
+# define emitm_simm13_min -4096
-#define emitm_simm13_const(val) (((val) >= emitm_simm13_min) && ((val) <
emitm_simm13_max))
+# define emitm_simm13_const(val) (((val) >= emitm_simm13_min) && ((val) <
emitm_simm13_max))
-#define emitm_branch_max 8388607
-#define emitm_branch_min -8388608
+# define emitm_branch_max 8388607
+# define emitm_branch_min -8388608
/* format 1 - only instruction */
-#define emitm_call_30(pc, disp30) { \
+# define emitm_call_30(pc, disp30) { \
*(unsigned *)(pc) = emitm_opval(1) | (disp30); \
pc += 4; }
/* format 2a - sethi primarily */
-#define emitm_2a(pc, op, rd, op2, imm22) { \
+# define emitm_2a(pc, op, rd, op2, imm22) { \
*(unsigned *)(pc) = emitm_opval(op) | emitm_rd(rd) | emitm_op2val(op2) | \
(imm22); \
pc += 4; }
/* format 2b - branches */
-#define emitm_2b(pc, a, cond, op2, disp22) { \
+# define emitm_2b(pc, a, cond, op2, disp22) { \
*(unsigned *)(pc) = emitm_opval(0) | ((unsigned)(a) << 29) | \
((unsigned)(cond) << 25) | emitm_op2val(op2) | \
emitm_mask(22, disp22); \
pc += 4; }
/* Generic fields of format 3 */
-#define emitm_fmt3(pc, op, rd, op3, rs1, low14) { \
+# define emitm_fmt3(pc, op, rd, op3, rs1, low14) { \
*(unsigned *)pc = emitm_opval(op) |emitm_rd(rd) | emitm_op3val(op3) | \
emitm_rs1(rs1) | (low14); \
pc +=4 ; }
/* format 3a */
-#define emitm_3a(pc, op, rd, op3, rs1, asi, rs2) \
+# define emitm_3a(pc, op, rd, op3, rs1, asi, rs2) \
emitm_fmt3(pc, op, rd, op3, rs1, ((asi) << 5) | (rs2))
/* format 3b */
-#define emitm_3b(pc, op, rd, op3, rs1, simm13) \
+# define emitm_3b(pc, op, rd, op3, rs1, simm13) \
emitm_fmt3(pc, op, rd, op3, rs1, (1L << 13) | emitm_mask(13, (simm13)))
/* format 3c */
-#define emitm_3c(pc, op, rd, op3, rs1, opf, rs2) \
+# define emitm_3c(pc, op, rd, op3, rs1, opf, rs2) \
emitm_fmt3(pc, op, rd, op3, rs1, (opf << 5) | (rs2))
/* Miscellaneous instructions */
/* sethi imm22, r[rd] */
-#define emitm_sethi(pc, imm22, rd) emitm_2a(pc, 0, rd, 04, imm22)
+# define emitm_sethi(pc, imm22, rd) emitm_2a(pc, 0, rd, 04, imm22)
/* NOP */
-#define emitm_nop(pc) emitm_sethi(pc, 0, 0)
+# define emitm_nop(pc) emitm_sethi(pc, 0, 0)
/* SAVE */
-#define emitm_save_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 074, rs1, 0, rs2)
-#define emitm_save_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 074, rs1, i)
+# define emitm_save_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 074, rs1, 0, rs2)
+# define emitm_save_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 074, rs1, i)
/* RESTORE */
-#define emitm_restore_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 075, rs1, 0, rd)
-#define emitm_restore_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 075, rs1, i)
+# define emitm_restore_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 075, rs1, 0,
rd)
+# define emitm_restore_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 075, rs1, i)
/* MOV */
-#define emitm_mov_r(pc, rs, rd) emitm_or_r(pc, emitm_g(0), rs, rd)
-#define emitm_mov_i(pc, i, rd) emitm_or_i(pc, emitm_g(0), i, rd)
+# define emitm_mov_r(pc, rs, rd) emitm_or_r(pc, emitm_g(0), rs, rd)
+# define emitm_mov_i(pc, i, rd) emitm_or_i(pc, emitm_g(0), i, rd)
/* Integer Register Loads */
/* ldX[rs1 + simm13], rd */
-#define emitm_ldsb_i(pc, rs1, i, rd) emitm_3b(pc, 3, rd, 011, rs1, i)
-#define emitm_ldub_i(pc, rs1, i, rd) emitm_3b(pc, 3, rd, 001, rs1, i)
-#define emitm_ldsh_i(pc, rs1, i, rd) emitm_3b(pc, 3, rd, 012, rs1, i)
-#define emitm_lduh_i(pc, rs1, i, rd) emitm_3b(pc, 3, rd, 002, rs1, i)
-#define emitm_ld_i(pc, rs1, i, rd) emitm_3b(pc, 3, rd, 000, rs1, i)
-#define emitm_ldd_i(pc, rs1, i, rd) emitm_3b(pc, 3, rd, 003, rs1, i)
+# define emitm_ldsb_i(pc, rs1, i, rd) emitm_3b(pc, 3, rd, 011, rs1, i)
+# define emitm_ldub_i(pc, rs1, i, rd) emitm_3b(pc, 3, rd, 001, rs1, i)
+# define emitm_ldsh_i(pc, rs1, i, rd) emitm_3b(pc, 3, rd, 012, rs1, i)
+# define emitm_lduh_i(pc, rs1, i, rd) emitm_3b(pc, 3, rd, 002, rs1, i)
+# define emitm_ld_i(pc, rs1, i, rd) emitm_3b(pc, 3, rd, 000, rs1, i)
+# define emitm_ldd_i(pc, rs1, i, rd) emitm_3b(pc, 3, rd, 003, rs1, i)
/* ldX[rs1 + rs2], rd */
-#define emitm_ldsb_r(pc, rs1, rs2, rd) emitm_3a(pc, 3, rd, 011, rs1, 0, rs2)
-#define emitm_ldub_r(pc, rs1, rs2, rd) emitm_3a(pc, 3, rd, 001, rs1, 0, rs2)
-#define emitm_ldsh_r(pc, rs1, rs2, rd) emitm_3a(pc, 3, rd, 012, rs1, 0, rs2)
-#define emitm_lduh_r(pc, rs1, rs2, rd) emitm_3a(pc, 3, rd, 002, rs1, 0, rs2)
-#define emitm_ld_r(pc, rs1, rs2, rd) emitm_3a(pc, 3, rd, 000, rs1, 0, rs2)
-#define emitm_ldd_r(pc, rs1, rs2, rd) emitm_3a(pc, 3, rd, 003, rs1, 0, rs2)
+# define emitm_ldsb_r(pc, rs1, rs2, rd) emitm_3a(pc, 3, rd, 011, rs1, 0, rs2)
+# define emitm_ldub_r(pc, rs1, rs2, rd) emitm_3a(pc, 3, rd, 001, rs1, 0, rs2)
+# define emitm_ldsh_r(pc, rs1, rs2, rd) emitm_3a(pc, 3, rd, 012, rs1, 0, rs2)
+# define emitm_lduh_r(pc, rs1, rs2, rd) emitm_3a(pc, 3, rd, 002, rs1, 0, rs2)
+# define emitm_ld_r(pc, rs1, rs2, rd) emitm_3a(pc, 3, rd, 000, rs1, 0, rs2)
+# define emitm_ldd_r(pc, rs1, rs2, rd) emitm_3a(pc, 3, rd, 003, rs1, 0, rs2)
/* Integer Register Stores */
/* stX rd, [rs1 + simm13] */
-#define emitm_stb_i(pc, rd, rs1, i) emitm_3b(pc, 3, rd, 005, rs1, i)
-#define emitm_sth_i(pc, rd, rs1, i) emitm_3b(pc, 3, rd, 006, rs1, i)
-#define emitm_st_i(pc, rd, rs1, i) emitm_3b(pc, 3, rd, 004, rs1, i)
-#define emitm_std_i(pc, rd, rs1, i) emitm_3b(pc, 3, rd, 007, rs1, i)
+# define emitm_stb_i(pc, rd, rs1, i) emitm_3b(pc, 3, rd, 005, rs1, i)
+# define emitm_sth_i(pc, rd, rs1, i) emitm_3b(pc, 3, rd, 006, rs1, i)
+# define emitm_st_i(pc, rd, rs1, i) emitm_3b(pc, 3, rd, 004, rs1, i)
+# define emitm_std_i(pc, rd, rs1, i) emitm_3b(pc, 3, rd, 007, rs1, i)
/* stX rd, [rs1 + rs2] */
-#define emitm_stb_r(pc, rd, rs1, rs2) emitm_3a(pc, 3, rd, 005, rs1, 0, rs2)
-#define emitm_sth_r(pc, rd, rs1, rs2) emitm_3a(pc, 3, rd, 006, rs1, 0, rs2)
-#define emitm_st_r(pc, rd, rs1, rs2) emitm_3a(pc, 3, rd, 004, rs1, 0, rs2)
-#define emitm_std_r(pc, rd, rs1, rs2) emitm_3a(pc, 3, rd, 007, rs1, 0, rs2)
+# define emitm_stb_r(pc, rd, rs1, rs2) emitm_3a(pc, 3, rd, 005, rs1, 0, rs2)
+# define emitm_sth_r(pc, rd, rs1, rs2) emitm_3a(pc, 3, rd, 006, rs1, 0, rs2)
+# define emitm_st_r(pc, rd, rs1, rs2) emitm_3a(pc, 3, rd, 004, rs1, 0, rs2)
+# define emitm_std_r(pc, rd, rs1, rs2) emitm_3a(pc, 3, rd, 007, rs1, 0, rs2)
/* Floating Point Register Loads */
/* ldX[rs1 + simm13], freg[rd] */
-#define emitm_ldf_i(pc, rs1, i, rd) emitm_3b(pc, 3, rd, 040, rs1, i)
-#define emitm_lddf_i(pc, rs1, i, rd) emitm_3b(pc, 3, rd, 043, rs1, i)
+# define emitm_ldf_i(pc, rs1, i, rd) emitm_3b(pc, 3, rd, 040, rs1, i)
+# define emitm_lddf_i(pc, rs1, i, rd) emitm_3b(pc, 3, rd, 043, rs1, i)
-#define emitm_ldfsr_i(pc, rs1, i, rd) emitm_3b(pc, 3, rd, 041, rs1, i)
+# define emitm_ldfsr_i(pc, rs1, i, rd) emitm_3b(pc, 3, rd, 041, rs1, i)
/* ldX[rs1 + rs2], freg[rd] */
-#define emitm_ldf_r(pc, rs1, rs2, rd) emitm_3a(pc, 3, rd, 040, rs1, 0, rs2)
-#define emitm_lddf_r(pc, rs1, rs2, rd) emitm_3a(pc, 3, rd, 043, rs1, 0, rs2)
+# define emitm_ldf_r(pc, rs1, rs2, rd) emitm_3a(pc, 3, rd, 040, rs1, 0, rs2)
+# define emitm_lddf_r(pc, rs1, rs2, rd) emitm_3a(pc, 3, rd, 043, rs1, 0, rs2)
-#define emitm_ldfsr_r(pc, rs1, rs2, rd) emitm_3a(pc, 3, rd, 041, rs1, 0, rs2)
+# define emitm_ldfsr_r(pc, rs1, rs2, rd) emitm_3a(pc, 3, rd, 041, rs1, 0, rs2)
/* Floating Point Register Stores */
/* stX freg[rd], [rs1 + simm13] */
-#define emitm_stf_i(pc, rd, rs1, i) emitm_3b(pc, 3, rd, 044, rs1, i)
-#define emitm_stdf_i(pc, rd, rs1, i) emitm_3b(pc, 3, rd, 047, rs1, i)
+# define emitm_stf_i(pc, rd, rs1, i) emitm_3b(pc, 3, rd, 044, rs1, i)
+# define emitm_stdf_i(pc, rd, rs1, i) emitm_3b(pc, 3, rd, 047, rs1, i)
-#define emitm_stfsr_i(pc, rd, rs1, i) emitm_3b(pc, 3, rd, 045, rs1, i)
+# define emitm_stfsr_i(pc, rd, rs1, i) emitm_3b(pc, 3, rd, 045, rs1, i)
/* stX freg[rd], [rs1 + rs2] */
-#define emitm_stf_r_r(pc, rd, rs1, rs2) emitm_3a(pc, 3, rd, 044, rs1, 0, rs2)
-#define emitm_stdf_r_r(pc, rd, rs1, rs2) emitm_3a(pc, 3, rd, 047, rs1, 0, rs2)
-#define emitm_stfsr_r_r(pc, rd, rs1, rs2) emitm_3a(pc, 3, rd, 045, rs1, 0, rs2)
+# define emitm_stf_r_r(pc, rd, rs1, rs2) emitm_3a(pc, 3, rd, 044, rs1, 0,
rs2)
+# define emitm_stdf_r_r(pc, rd, rs1, rs2) emitm_3a(pc, 3, rd, 047, rs1, 0,
rs2)
+# define emitm_stfsr_r_r(pc, rd, rs1, rs2) emitm_3a(pc, 3, rd, 045, rs1, 0,
rs2)
/* Logical instructions */
/* op r[rs1], r[rs2], r[rd] */
-#define emitm_logic_r(pc, op3, rs1, rs2, rd) \
+# define emitm_logic_r(pc, op3, rs1, rs2, rd) \
emitm_3a(pc, 2, rd, op3, rs1, 0, rs2)
/* op r[rs1], simm13, r[rd] */
-#define emitm_logic_i(pc, op3, rs1, simm13, rd) \
+# define emitm_logic_i(pc, op3, rs1, simm13, rd) \
emitm_3b(pc, 2, rd, op3, rs1, simm13)
-#define emitm_and_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 001, rs1, rs2, rd)
-#define emitm_andcc_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 021, rs1, rs2, rd)
-#define emitm_andn_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 005, rs1, rs2, rd)
-#define emitm_andncc_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 025, rs1, rs2, rd)
-#define emitm_and_i(pc, rs1, i, rd) emitm_logic_i(pc, 001, rs1, i, rd)
-#define emitm_andcc_i(pc, rs1, i, rd) emitm_logic_i(pc, 021, rs1, i, rd)
-#define emitm_andn_i(pc, rs1, i, rd) emitm_logic_i(pc, 005, rs1, i, rd)
-#define emitm_andncc_i(pc, rs1, i, rd) emitm_logic_i(pc, 025, rs1, i, rd)
-#define emitm_or_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 002, rs1, rs2, rd)
-#define emitm_orcc_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 022, rs1, rs2, rd)
-#define emitm_orn_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 006, rs1, rs2, rd)
-#define emitm_orncc_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 026, rs1, rs2, rd)
-#define emitm_or_i(pc, rs1, i, rd) emitm_logic_i(pc, 002, rs1, i, rd)
-#define emitm_orcc_i(pc, rs1, i, rd) emitm_logic_i(pc, 022, rs1, i, rd)
-#define emitm_orn_i(pc, rs1, i, rd) emitm_logic_i(pc, 006, rs1, i, rd)
-#define emitm_orncc_i(pc, rs1, i, rd) emitm_logic_i(pc, 026, rs1, i, rd)
-#define emitm_xor_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 003, rs1, rs2, rd)
-#define emitm_xorcc_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 023, rs1, rs2, rd)
-#define emitm_xorn_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 007, rs1, rs2, rd)
-#define emitm_xorncc_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 027, rs1, rs2, rd)
-#define emitm_xor_i(pc, rs1, i, rd) emitm_logic_i(pc, 003, rs1, i, rd)
-#define emitm_xorcc_i(pc, rs1, i, rd) emitm_logic_i(pc, 023, rs1, i, rd)
-#define emitm_xorn_i(pc, rs1, i, rd) emitm_logic_i(pc, 007, rs1, i, rd)
-#define emitm_xorncc_i(pc, rs1, i, rd) emitm_logic_i(pc, 027, rs1, i, rd)
+# define emitm_and_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 001, rs1, rs2, rd)
+# define emitm_andcc_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 021, rs1, rs2, rd)
+# define emitm_andn_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 005, rs1, rs2, rd)
+# define emitm_andncc_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 025, rs1, rs2, rd)
+# define emitm_and_i(pc, rs1, i, rd) emitm_logic_i(pc, 001, rs1, i, rd)
+# define emitm_andcc_i(pc, rs1, i, rd) emitm_logic_i(pc, 021, rs1, i, rd)
+# define emitm_andn_i(pc, rs1, i, rd) emitm_logic_i(pc, 005, rs1, i, rd)
+# define emitm_andncc_i(pc, rs1, i, rd) emitm_logic_i(pc, 025, rs1, i, rd)
+# define emitm_or_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 002, rs1, rs2, rd)
+# define emitm_orcc_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 022, rs1, rs2, rd)
+# define emitm_orn_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 006, rs1, rs2, rd)
+# define emitm_orncc_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 026, rs1, rs2, rd)
+# define emitm_or_i(pc, rs1, i, rd) emitm_logic_i(pc, 002, rs1, i, rd)
+# define emitm_orcc_i(pc, rs1, i, rd) emitm_logic_i(pc, 022, rs1, i, rd)
+# define emitm_orn_i(pc, rs1, i, rd) emitm_logic_i(pc, 006, rs1, i, rd)
+# define emitm_orncc_i(pc, rs1, i, rd) emitm_logic_i(pc, 026, rs1, i, rd)
+# define emitm_xor_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 003, rs1, rs2, rd)
+# define emitm_xorcc_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 023, rs1, rs2, rd)
+# define emitm_xorn_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 007, rs1, rs2, rd)
+# define emitm_xorncc_r(pc, rs1, rs2, rd) emitm_logic_r(pc, 027, rs1, rs2, rd)
+# define emitm_xor_i(pc, rs1, i, rd) emitm_logic_i(pc, 003, rs1, i, rd)
+# define emitm_xorcc_i(pc, rs1, i, rd) emitm_logic_i(pc, 023, rs1, i, rd)
+# define emitm_xorn_i(pc, rs1, i, rd) emitm_logic_i(pc, 007, rs1, i, rd)
+# define emitm_xorncc_i(pc, rs1, i, rd) emitm_logic_i(pc, 027, rs1, i, rd)
/* Shift Left Logical */
-#define emitm_sll_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 045, rs1, 0, rs2)
-#define emitm_sll_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 045, rs1, i)
+# define emitm_sll_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 045, rs1, 0, rs2)
+# define emitm_sll_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 045, rs1, i)
/* Shift Right Logical */
-#define emitm_srl_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 046, rs1, 0, rs2)
-#define emitm_srl_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 046, rs1, i)
+# define emitm_srl_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 046, rs1, 0, rs2)
+# define emitm_srl_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 046, rs1, i)
/* Shift Right Arithmetic */
-#define emitm_sra_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 047, rs1, 0, rs2)
-#define emitm_sra_i(pc, rs1, i, rd) emitm_3a(pc, 2, rd, 047, rs1, i)
+# define emitm_sra_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 047, rs1, 0, rs2)
+# define emitm_sra_i(pc, rs1, i, rd) emitm_3a(pc, 2, rd, 047, rs1, i)
/* Arithmetic ops */
-#define emitm_add_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 0, rs1, 0, rs2)
-#define emitm_addcc_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 020, rs1, 0, rs2)
-#define emitm_addX_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 010, rs1, 0, rs2)
-#define emitm_addXcc_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 030, rs1, 0, rs2)
-#define emitm_add_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 0, rs1, i)
-#define emitm_addcc_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 020, rs1, i)
-#define emitm_addX_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 010, rs1, i)
-#define emitm_addXcc_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 030, rs1, i)
+# define emitm_add_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 0, rs1, 0, rs2)
+# define emitm_addcc_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 020, rs1, 0,
rs2)
+# define emitm_addX_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 010, rs1, 0,
rs2)
+# define emitm_addXcc_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 030, rs1, 0,
rs2)
+# define emitm_add_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 0, rs1, i)
+# define emitm_addcc_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 020, rs1, i)
+# define emitm_addX_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 010, rs1, i)
+# define emitm_addXcc_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 030, rs1, i)
/* Arithmetic ops */
-#define emitm_sub_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 004, rs1, 0, rs2)
-#define emitm_subcc_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 024, rs1, 0, rs2)
-#define emitm_subX_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 014, rs1, 0, rs2)
-#define emitm_subXcc_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 034, rs1, 0, rs2)
-#define emitm_sub_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 004, rs1, i)
-#define emitm_subcc_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 024, rs1, i)
-#define emitm_subX_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 014, rs1, i)
-#define emitm_subXcc_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 034, rs1, i)
+# define emitm_sub_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 004, rs1, 0,
rs2)
+# define emitm_subcc_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 024, rs1, 0,
rs2)
+# define emitm_subX_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 014, rs1, 0,
rs2)
+# define emitm_subXcc_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 034, rs1, 0,
rs2)
+# define emitm_sub_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 004, rs1, i)
+# define emitm_subcc_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 024, rs1, i)
+# define emitm_subX_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 014, rs1, i)
+# define emitm_subXcc_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 034, rs1, i)
/* Floating point operations */
/* MOV */
-#define emitm_fmovs(pc, rs, rd) emitm_3c(pc, 2, rd, 064, 0, 0001, rs)
+# define emitm_fmovs(pc, rs, rd) emitm_3c(pc, 2, rd, 064, 0, 0001, rs)
/* Arithmetic operations */
-#define emitm_faddd(pc, rs1, rs2, rd) emitm_3c(pc, 2, rd, 064, rs1, 0102, rs2)
-#define emitm_fsubd(pc, rs1, rs2, rd) emitm_3c(pc, 2, rd, 064, rs1, 0106, rs2)
-#define emitm_fmuld(pc, rs1, rs2, rd) emitm_3c(pc, 2, rd, 064, rs1, 0112, rs2)
-#define emitm_fdivd(pc, rs1, rs2, rd) emitm_3c(pc, 2, rd, 064, rs1, 0116, rs2)
-#define emitm_fabss(pc, rs, rd) emitm_3c(pc, 2, rd, 064, 0, 0011, rs)
-#define emitm_fnegs(pc, rs, rd) emitm_3c(pc, 2, rd, 064, 0, 0005, rs)
+# define emitm_faddd(pc, rs1, rs2, rd) emitm_3c(pc, 2, rd, 064, rs1, 0102,
rs2)
+# define emitm_fsubd(pc, rs1, rs2, rd) emitm_3c(pc, 2, rd, 064, rs1, 0106,
rs2)
+# define emitm_fmuld(pc, rs1, rs2, rd) emitm_3c(pc, 2, rd, 064, rs1, 0112,
rs2)
+# define emitm_fdivd(pc, rs1, rs2, rd) emitm_3c(pc, 2, rd, 064, rs1, 0116,
rs2)
+# define emitm_fabss(pc, rs, rd) emitm_3c(pc, 2, rd, 064, 0, 0011, rs)
+# define emitm_fnegs(pc, rs, rd) emitm_3c(pc, 2, rd, 064, 0, 0005, rs)
-#define emitm_fsqrtd(pc, rs, rd) emitm_3c(pc, 2, rd, 064, 0, 0052, rs)
+# define emitm_fsqrtd(pc, rs, rd) emitm_3c(pc, 2, rd, 064, 0, 0052, rs)
/* Floating <-> Integer Conversion */
-#define emitm_fitod(pc, rs, rd) emitm_3c(pc, 2, rd, 064, 0, 0310, rs)
-#define emitm_fdtoi(pc, rs, rd) emitm_3c(pc, 2, rd, 064, 0, 0322, rs)
+# define emitm_fitod(pc, rs, rd) emitm_3c(pc, 2, rd, 064, 0, 0310, rs)
+# define emitm_fdtoi(pc, rs, rd) emitm_3c(pc, 2, rd, 064, 0, 0322, rs)
/* Floating point tests */
-#define emitm_fcmpd(pc, rs1, rs2) emitm_3c(pc, 2, 0, 065, rs1, 0122, rs2)
+# define emitm_fcmpd(pc, rs1, rs2) emitm_3c(pc, 2, 0, 065, rs1, 0122, rs2)
/* Jump and Link */
-#define emitm_jumpl_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 070, rs1, 0, rs2)
-#define emitm_jumpl_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 070, rs1, i)
+# define emitm_jumpl_r(pc, rs1, rs2, rd) emitm_3a(pc, 2, rd, 070, rs1, 0, rs2)
+# define emitm_jumpl_i(pc, rs1, i, rd) emitm_3b(pc, 2, rd, 070, rs1, i)
/* RET */
-#define emitm_ret(pc) emitm_jumpl_i(pc, emitm_i(7), 8, emitm_g(0))
+# define emitm_ret(pc) emitm_jumpl_i(pc, emitm_i(7), 8, emitm_g(0))
/* integer conditions */
-#define emitm_ba 010
-#define emitm_bn 000
-#define emitm_bne 011
-#define emitm_be 001
-#define emitm_bg 012
-#define emitm_ble 002
-#define emitm_bge 013
-#define emitm_bl 003
-#define emitm_bgu 014
-#define emitm_bleu 004
-#define emitm_bcc 015
-#define emitm_bcs 005
-#define emitm_bpos 016
-#define emitm_bneg 006
-#define emitm_bvc 017
-#define emitm_bvs 007
+# define emitm_ba 010
+# define emitm_bn 000
+# define emitm_bne 011
+# define emitm_be 001
+# define emitm_bg 012
+# define emitm_ble 002
+# define emitm_bge 013
+# define emitm_bl 003
+# define emitm_bgu 014
+# define emitm_bleu 004
+# define emitm_bcc 015
+# define emitm_bcs 005
+# define emitm_bpos 016
+# define emitm_bneg 006
+# define emitm_bvc 017
+# define emitm_bvs 007
/* floating-point conditions */
-#define emitm_fba 010
-#define emitm_fbn 000
-#define emitm_fbu 007
-#define emitm_fbg 006
-#define emitm_fbug 005
-#define emitm_fbl 004
-#define emitm_fbul 003
-#define emitm_fblg 002
-#define emitm_fbne 001
-#define emitm_fbe 011
-#define emitm_fbue 012
-#define emitm_fbge 013
-#define emitm_fbuge 014
-#define emitm_fble 015
-#define emitm_fbule 016
-#define emitm_fbo 017
+# define emitm_fba 010
+# define emitm_fbn 000
+# define emitm_fbu 007
+# define emitm_fbg 006
+# define emitm_fbug 005
+# define emitm_fbl 004
+# define emitm_fbul 003
+# define emitm_fblg 002
+# define emitm_fbne 001
+# define emitm_fbe 011
+# define emitm_fbue 012
+# define emitm_fbge 013
+# define emitm_fbuge 014
+# define emitm_fble 015
+# define emitm_fbule 016
+# define emitm_fbo 017
-#define emitm_icc 02
-#define emitm_fcc 06
+# define emitm_icc 02
+# define emitm_fcc 06
/* Branch on integer condition codes */
-#define emitm_bicc(pc, a, cond, disp22) emitm_2b(pc, a, cond, 02, disp22)
+# define emitm_bicc(pc, a, cond, disp22) emitm_2b(pc, a, cond, 02, disp22)
/* Branch on floating-point condition codes */
-#define emitm_fbfcc(pc, a, cond, disp22) emitm_2b(pc, a, cond, 06, disp22)
+# define emitm_fbfcc(pc, a, cond, disp22) emitm_2b(pc, a, cond, 06, disp22)
-#define jit_emit_mov_rr_i(pc, dst, src) emitm_mov_r(pc, src, dst)
-#define jit_emit_mov_rr_n(pc, dst, src) { \
+# define jit_emit_mov_rr_i(pc, dst, src) emitm_mov_r(pc, src, dst)
+# define jit_emit_mov_rr_n(pc, dst, src) { \
emitm_fmovs(pc, src, dst); \
emitm_fmovs(pc, (src)+1, (dst)+1); }
@@ -338,37 +338,37 @@
* */
/* The register holding the interpreter pointer */
-#define Parrot_jit_intrp emitm_i(0)
+# define Parrot_jit_intrp emitm_i(0)
/* The register holding the address of I0 */
-#define Parrot_jit_regbase emitm_i(2)
+# define Parrot_jit_regbase emitm_i(2)
/* The register containing the address of the opmap */
-#define Parrot_jit_opmap emitm_i(3)
+# define Parrot_jit_opmap emitm_i(3)
/* These registers should be used only in .jit ops and not helper routines
* in jit_emit.h
*/
-#define ISR1 emitm_i(4)
-#define ISR2 emitm_i(5)
-#define FSR1 emitm_f(0)
-#define FSR2 emitm_f(2)
+# define ISR1 emitm_i(4)
+# define ISR2 emitm_i(5)
+# define FSR1 emitm_f(0)
+# define FSR2 emitm_f(2)
/* This register can be used only in jit_emit.h calculations */
-#define XSR1 emitm_l(0)
-#define XSR2 emitm_g(1)
+# define XSR1 emitm_l(0)
+# define XSR2 emitm_g(1)
-#define Parrot_jit_regbase_ptr(interpreter) ®_INT(0)
+# define Parrot_jit_regbase_ptr(interpreter) ®_INT(0)
/* The offset of a Parrot register from the base register */
-#define Parrot_jit_regoff(a, i) (unsigned)(a) -
(unsigned)(Parrot_jit_regbase_ptr(i))
+# define Parrot_jit_regoff(a, i) (unsigned)(a) -
(unsigned)(Parrot_jit_regbase_ptr(i))
/* interpreter->code */
-#define jit_emit_load_coderef(pc, reg) \
+# define jit_emit_load_coderef(pc, reg) \
emitm_ld_i(jit_info->native_ptr, Parrot_jit_intrp, offsetof(Interp, code),
reg); \
/* Load op_map address */
-#define jit_emit_load_op_map(pc, code) \
+# define jit_emit_load_op_map(pc, code) \
emitm_ld_i(jit_info->native_ptr, code,
\
offsetof(struct PackFile_ByteCode, jit_info), XSR1);
\
emitm_ld_i(jit_info->native_ptr, XSR1,
\
@@ -376,7 +376,7 @@
Parrot_jit_opmap);
/* Construct the starting address of the byte code (code start) */
-#define jit_emit_load_code_start(pc, code) \
+# define jit_emit_load_code_start(pc, code) \
emitm_ld_i(jit_info->native_ptr, code, offsetof(struct PackFile_Segment,
data), \
XSR1);
@@ -446,11 +446,11 @@
}
/* Generate branch on integer condition codes */
-#define Parrot_jit_bicc(jit_info, cond, annul, disp) \
+# define Parrot_jit_bicc(jit_info, cond, annul, disp) \
Parrot_jit_branch(jit_info, emitm_icc, cond, annul, disp)
/* Generate branch on floating-point condition codes */
-#define Parrot_jit_fbfcc(jit_info, cond, annul, disp) \
+# define Parrot_jit_fbfcc(jit_info, cond, annul, disp) \
Parrot_jit_branch(jit_info, emitm_fcc, cond, annul, disp)
/* This function loads a value */
@@ -732,7 +732,7 @@
Parrot_jit_bytejump(jit_info, interpreter, emitm_o(0));
}
-#undef Parrot_jit_restart_op
+# undef Parrot_jit_restart_op
void Parrot_jit_restart_op(Parrot_jit_info_t *jit_info,
Interp * interpreter)
{
@@ -784,6 +784,36 @@
Parrot_jit_regbase, Parrot_jit_regoff(mem, interpreter), reg);
}
+/* XXX Hack to fix the following bug as of 05 Dec 2005:
+ Hack [perl #37819] Sun4 builds fail linking against jit.o
+ These dummy definitions blindly copied from jit/mips/jit_emit.h.
+ Apparently, they need to be inside a JIT_EMIT section of this
+ file.
+ See also the "Hack [perl #37819]" section near the bottom of this
+ file.
+*/
+void
+Parrot_jit_emit_mov_mr_offs(Interp * interpreter, int base, size_t offs, int
reg)
+{
+}
+
+void
+Parrot_jit_emit_mov_rm_offs(Interp * interpreter, int reg, int base, size_t
offs)
+{
+}
+
+void
+Parrot_jit_emit_mov_mr_n_offs(Interp * interpreter, int base, size_t offs, int
reg)
+{
+}
+
+void
+Parrot_jit_emit_mov_rm_n_offs(Interp * interpreter, int reg, int base, size_t
offs)
+{
+}
+/* XXX end blind hack for [perl #37819] --but see
+ additional hack section at bottom.
+*/
# ifndef NO_JIT_VTABLE_OPS
# undef Parrot_jit_vtable1_op
@@ -1111,15 +1141,15 @@
emitm_mov_r(jit_info->native_ptr, Parrot_jit_intrp, emitm_o(0));
}
-#endif /* NO_JIT_VTABLE_OPS */
+# endif /* NO_JIT_VTABLE_OPS */
-#else
+#else /* JIT_EMIT */
# define REQUIRES_CONSTANT_POOL 0
# define INT_REGISTERS_TO_MAP 6
# define FLOAT_REGISTERS_TO_MAP 6
-#ifndef JIT_IMCC
+# ifndef JIT_IMCC
char intval_map[INT_REGISTERS_TO_MAP] =
{ emitm_l(1), emitm_l(2), emitm_l(3), emitm_l(4), emitm_l(5), emitm_l(6)
};
@@ -1127,12 +1157,21 @@
char floatval_map[] =
{ emitm_f(4), emitm_f(6), emitm_f(8), emitm_f(10), emitm_f(12), emitm_f(14)
};
-#endif
+# endif
+
+# define PRESERVED_INT_REGS 6
+# define PRESERVED_FLOAT_REGS 0
-#define PRESERVED_INT_REGS 6
-#define PRESERVED_FLOAT_REGS 0
+#endif /* JIT_EMIT */
+
+/* XXX Hack [perl #37819] Unlike the functions above, this one apparently
+ sometimes needs to be defined both in and out of the JIT_EMIT section.
+ However, at this point, the Parrot_jit_regbase symbol is not
+ defined, so we replace it with the integer 26 (which is what it
+ expands to anyway.
+*/
+# define Parrot_jit_emit_get_base_reg_no(pc) 26 /*Parrot_jit_regbase */
-#endif
#endif /* PARROT_SUN4_JIT_EMIT_H_GUARD */
/*
--
Andy Dougherty [EMAIL PROTECTED]
