Dheeraj Kumar Arora wrote:
I m interseted in one of LLVM project
"Implement well-known optimizations in PIR compiler (SSA -> register
allocation)"
[ I have answerd this ]
Parrot is a register based virtual machine with 32*4 registers. There
are a lot of studies WRT optimizations and register allocations for
compilers and hardware CPUs but probably all these things can be applied
to Parrot too. See also imcc/cfg.c and imcc/reg_alloc.c for existing code.
I'm not a computer scientist nor am I able to follow most of the papers
regarding various optimization techniques or the needed infrastructure
to implement it
Anyway, there are folks on our mailing list like Curtis Rawls, who could
probably better summarize what's needed and what should be done.
Can Any send me the details?
Yes please, folks.
leo
