Stephane Peiry <[EMAIL PROTECTED]> wrote: > On Mon, Feb 23, 2004 at 11:07:48AM +0100, Leopold Toetsch wrote: >> Yep. That's a bit complicated. The jit code tries to avoid >> loading/storing the same register from/to memory. > Actually on this, while looking at what jit on i386 would give for this > particular loop, just noticed it does quite a lot of these store/loads to > memory who are, afaik, useless? (althaugh as I understand they are needed > for the general case)
Yes. The problem are of course branches and branch targets. Before a branch there is a store and on a branch target is a load (the register assignment CPU-reg <-> Parrot-reg can and will differ in different basic blocks). So there may be unneeded store/load sequences. I tried (with some success) to avoid such sequences with imcc/jit.c, but that is currently unusable due to register renumbering with PCC. > 0x0829c5ed <jit_func+53>: mov $0x2,%ebx > 0x0829c5f2 <jit_func+58>: mov %esi,%esi > 0x0829c5f4 <jit_func+60>: mov %ebx,0x8278c74 > 0x0829c5fa <jit_func+66>: mov 0x8278c74,%ebx > 0x0829c600 <jit_func+72>: sub $0x1,%ebx > 0x0829c606 <jit_func+78>: test %ebx,%ebx > 0x0829c608 <jit_func+80>: jne 0x829c600 <jit_func+72> > (up here we could just skeep 58 to 66) No. mov %esi, %esi is a nop to align the branch target. And the load on the branch target can't be omitted either (or only if you know that the only brach comes from a place, where registers match. But - the loop itself doesn't do any load/stores so that's fine. > Stéphane leo
