Moreover, even if you'd find a way, wouldn't that save something < 1 usec of the 1 millisec pagefault ? A big contortion to get 0.1% improvement. I'm sure engineering time can be better spent.
Le 24 sept. 07 à 20:55, [EMAIL PROTECTED] a écrit : >> My means is not prefetch the page but use prefetch instruction >> >> (e.g. __asm__ __volatile__( " prefetchnta %0" : : >> "m" (*addr) ) ;// >> addr is fist parameter of pagefault handler, which caused page >> fault >> trap), prefetch the content in the addr into cache line. > > Let me reiterate that I don't understand how you're going to > accomplish > the prefetch with this instruction. This prefetch instruction takes a > virtual address as its argument. If you issue a prefetch > instruction in > the kernel's address space and pass it a virtual address in an address > space of a user process, you will either: > > a) prefetch unrelated data somewhere else in the kernel address space > b) generate a nop because the user's address isn't mapped in the > kernel. Loading from an address without page translation > entries would generate a page fault. > > In both of these cases, you're not obtaining the desired effect. > > -j > _______________________________________________ > perf-discuss mailing list > perf-discuss@opensolaris.org _______________________________________________ perf-discuss mailing list perf-discuss@opensolaris.org
