From: Tomasz Maciej Nowak <tmn...@gmail.com> With upstream changes hitting kernel 6.4 the dtb for u7623 ends up with both mac (gmac) disabled, since this is now the default status in mt7623.dtsi. Fix this by including mt7623a.dtsi (which already has all necessary bits) and enabling all revlevant ports. This will also do a side hustle of assigning proper clocks for power controller and specifying proper power domain for few devices.
Link: https://lore.kernel.org/all/20230210182505.24597-1-arinc.u...@arinc9.com Signed-off-by: Tomasz Maciej Nowak <tmn...@gmail.com> --- Please backport to 24.10 branch .../dts/mt7623a-unielec-u7623-02.dtsi | 117 +++++------------- 1 file changed, 30 insertions(+), 87 deletions(-) diff --git a/target/linux/mediatek/dts/mt7623a-unielec-u7623-02.dtsi b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02.dtsi index fedf8b859661..eaa2e74112e3 100644 --- a/target/linux/mediatek/dts/mt7623a-unielec-u7623-02.dtsi +++ b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02.dtsi @@ -4,7 +4,7 @@ */ #include <dt-bindings/input/input.h> -#include "mt7623.dtsi" +#include "mt7623a.dtsi" #include "mt6323.dtsi" / { @@ -102,92 +102,6 @@ status = "okay"; }; -ð { - status = "okay"; - - gmac0: mac@0 { - compatible = "mediatek,eth-mac"; - reg = <0>; - phy-mode = "trgmii"; - - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; - }; - - mdio: mdio-bus { - #address-cells = <1>; - #size-cells = <0>; - - mt7530: switch@1f { - }; - }; -}; - -&mt7530 { - compatible = "mediatek,mt7530"; - reg = <31>; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - mediatek,mcm; - resets = <ðsys 2>; - reset-names = "mcm"; - core-supply = <&mt6323_vpa_reg>; - io-supply = <&mt6323_vemc3v3_reg>; - - dsa,mii-bus = <&mdio>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - port@0 { - reg = <0>; - label = "lan0"; - cpu = <&cpu_port0>; - }; - - port@1 { - reg = <1>; - label = "lan1"; - cpu = <&cpu_port0>; - }; - - port@2 { - reg = <2>; - label = "lan2"; - cpu = <&cpu_port0>; - }; - - port@3 { - reg = <3>; - label = "lan3"; - cpu = <&cpu_port0>; - }; - - port@4 { - reg = <4>; - label = "wan"; - cpu = <&cpu_port0>; - }; - - cpu_port0: port@6 { - reg = <6>; - ethernet = <&gmac0>; - phy-mode = "trgmii"; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - }; -}; - &mmc0 { pinctrl-names = "default", "state_uhs"; pinctrl-0 = <&mmc0_pins_default>; @@ -305,6 +219,35 @@ mediatek,long-press-mode = <0>; }; +&switch0 { + ports { + port@0 { + status = "okay"; + label = "lan0"; + }; + + port@1 { + status = "okay"; + label = "lan1"; + }; + + port@2 { + status = "okay"; + label = "lan2"; + }; + + port@3 { + status = "okay"; + label = "lan3"; + }; + + port@4 { + status = "okay"; + label = "wan"; + }; + }; +}; + &uart2 { pinctrl-names = "default"; pinctrl-0 = <&uart2_pins_b>; -- 2.48.1 _______________________________________________ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
