[PATCH 0/2] ath79: correct dts for GMAC0 to SW PHY

[Randy Li via openwrt-devel]

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I think the way we define the WAN port is not right in AR9341 and
AR9344 platform devices when its WAN port comes from its PHY of
its internal switch.

We use the eth1(GMAC1) as the MAC for the WAN port, that loses
the advantage of the GMAC0 HW that could offer(although we don't
have its offload drivers).

Unfortunately, I don't have those routers, here I just have
a AR9344 board from a ODM. That is why I didn't finish the
rest of devices. Besides, 02_network should be fixed after this.

+&pinmux {
+       pmx_led_wan_lan: pinmux_led_wan_lan {
+               pinctrl-single,bits = <0x10 0x292d0000 0xffff0000>,
+                       <0x14 0x2c2b2a 0xffffff>;
+       };
+};
+
+&builtin_switch {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pmx_led_wan_lan>;
+};
+
+&mdio0 {
+       status = "okay";
+
+       phy4: ethernet-phy@4 {
+               reg = <4>;
+       };
+};
+
+&eth0 {
+       status = "okay";
+       phy-mode = "mii";
+
+       nvmem-cells = <&macaddr_uboot_1fc00>;
+       nvmem-cell-names = "mac-address";
+       mac-address-increment = <(-1)>;
+
+       fixed-link {
+               speed = <100>;
+               full-duplex;
+       };
+};
+
+&eth1 {
+       status = "okay";
+       nvmem-cells = <&macaddr_uboot_1fc00>;
+       nvmem-cell-names = "mac-address";
+       mac-address-increment = <0>;
+};




Randy Li (2):
  ath79: correct switch PHYs for GMAC0 in ar934x
  [WIP]: ath79: remove confusing switch only

 .../ath79/dts/ar9341_tplink_tl-wr842n-v2.dts  |  4 +++
 target/linux/ath79/dts/ar9344_tplink_cpe.dtsi |  4 +++
 .../ath79/dts/ar9344_tplink_tl-wdr3500-v1.dts | 20 ++++++------
 .../ath79/dts/ar9344_tplink_tl-wr841hp-v2.dts |  4 +++
 .../linux/ath79/dts/ar9344_wd_mynet-n600.dts  |  5 ++-
 .../ath79/dts/ar9344_zbtlink_zbt-wd323.dts    |  4 +++
 target/linux/ath79/dts/ar934x.dtsi            | 31 ++++++++++---------
 7 files changed, 45 insertions(+), 27 deletions(-)

-- 
2.41.0

--- End Message ---

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