The flag to enable L2 address learning on egress frames is in bits 40,
with bit 0 being the leftmost bit of the header. This corresponds to
BIT(7) in the third 16-bit value of the header.
Correctly set L2LEARNING by fixing the off-by-one error.
Fixes: 9eab76c84e31 ("realtek: Improve TX CPU-Tag usage")
Signed-off-by: Sander Vanheule <san...@svanheule.net>
---
.../realtek/files-5.10/drivers/net/ethernet/rtl838x_eth.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/target/linux/realtek/files-5.10/drivers/net/ethernet/rtl838x_eth.c
b/target/linux/realtek/files-5.10/drivers/net/ethernet/rtl838x_eth.c
index 5fa156935798..26e573c3fec5 100644
--- a/target/linux/realtek/files-5.10/drivers/net/ethernet/rtl838x_eth.c
+++ b/target/linux/realtek/files-5.10/drivers/net/ethernet/rtl838x_eth.c
@@ -110,7 +110,7 @@ static void rtl839x_create_tx_header(struct p_hdr *h,
unsigned int dest_port, in
{
// cpu_tag[0] is reserved on the RTL83XX SoCs
h->cpu_tag[1] = 0x0100; // RTL8390_CPU_TAG marker
- h->cpu_tag[2] = BIT(4); /* AS_DPM flag */
+ h->cpu_tag[2] = BIT(7) | BIT(4); /* L2LEARNING and AS_DPM flags */
h->cpu_tag[3] = h->cpu_tag[4] = h->cpu_tag[5] = 0;
// h->cpu_tag[1] |= BIT(1) | BIT(0); // Bypass filter 1/2
if (dest_port >= 32) {
@@ -121,7 +121,6 @@ static void rtl839x_create_tx_header(struct p_hdr *h,
unsigned int dest_port, in
h->cpu_tag[4] = BIT(dest_port) >> 16;
h->cpu_tag[5] = BIT(dest_port) & 0xffff;
}
- h->cpu_tag[2] |= BIT(8); // Enable L2 Learning
/* Set internal priority (PRI) and enable (AS_PRI) */
if (prio >= 0)
--
2.36.1
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