This is an 8 port 1000BASE-T + 2 1000BASE-X SFP gigabit switch with PoE+
support, 65 W budget.
In order to manipulate the PoE+ one needs the rtl83xx-poe package [0].
Specifications
--------------
* SoC: Realtek RTL8380M 500 MHz MIPS 4KEc
* Flash: Macronix MX25L25645GMI-08G 32 MiB
* RAM: Nanya NT5CC256M8JQ-EK 256 MiB DDR3(L) SDRAM
* Ethernet: 8x 10/100/1000 1000BASE-T
2x 1000BASE-X SFP
* PoE+: Broadcom BCM59121B0KMLG (IEEE 802.3at-2009 compliant)
Controlled by Nuvoton M0516LDE MCU talking undocumented
protocol to the Realtek's second UART
* Buttons: Mode ("lights_toggle") and Reset
* LEDs: Power and link indication LEDs are working, others
unsupported.
* UART: 2.54 mm header with populated standard pin connector J8
Pin 1: Vcc (3.3 V)
Pin 2: Tx
Pin 3: Rx
Pin 4: GND
Baud and framing: 115200 8n1
Installation
------------
* Configure your client with static 10.90.90.91/24 address.
* Set up a TFTP server on your client and make it serve the initramfs
image. Connect it to port 1 of the switch.
* Connect serial, power up the switch, interrupt U-boot by hitting
Escape after seeing "Power on self test" message
* Download the image onto the device and boot from it:
> tftpboot 0x8f000000
10.90.90.91:openwrt-realtek-generic-d-link_dgs-1210-10p-r1-initramfs-kernel.bin
> bootm
* Once OpenWrt has booted reconfigure your client to use VID 100 and DHCP,
scp the sysupgrade image to /tmp and run sysupgrade.
[0]
https://git.openwrt.org/?p=openwrt/staging/blogic.git;a=tree;f=package/rtl83xx-poe;hb=2540faec92abf8f5e52eae0e77bfbdb47457252d
Signed-off-by: Paul Fertser <fercer...@gmail.com>
---
.../realtek/base-files/etc/board.d/02_network | 3 +
.../dts/rtl8382_d-link_dgs-1210-10p-r1.dts | 205 ++++++++++++++++++
target/linux/realtek/image/Makefile | 8 +
3 files changed, 216 insertions(+)
create mode 100644 target/linux/realtek/dts/rtl8382_d-link_dgs-1210-10p-r1.dts
diff --git a/target/linux/realtek/base-files/etc/board.d/02_network
b/target/linux/realtek/base-files/etc/board.d/02_network
index 58461c9c995f..fe40f007d29e 100644
--- a/target/linux/realtek/base-files/etc/board.d/02_network
+++ b/target/linux/realtek/base-files/etc/board.d/02_network
@@ -48,6 +48,9 @@ done
[ -n "$label_mac" ] && ucidef_set_label_macaddr $label_mac
case $board in
+d-link,dgs-1210-10p-r1)
+ ucidef_set_poe 65 "$lan_list"
+ ;;
netgear,gs110tpp-v1)
ucidef_set_poe 130 "$lan_list"
;;
diff --git a/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-10p-r1.dts
b/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-10p-r1.dts
new file mode 100644
index 000000000000..ef6ad94bb06c
--- /dev/null
+++ b/target/linux/realtek/dts/rtl8382_d-link_dgs-1210-10p-r1.dts
@@ -0,0 +1,205 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "rtl838x.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ compatible = "d-link,dgs-1210-10p-r1", "realtek,rtl838x-soc";
+ model = "D-Link DGS-1210-10P-R1";
+
+ aliases {
+ led-boot = &led_power;
+ led-failsafe = &led_power;
+ led-running = &led_power;
+ led-upgrade = &led_power;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x10000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led_power: power {
+ // GPIO 24 seems to provide power to the leds
+ label = "green:power";
+ gpios = <&gpio0 47 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ poll-interval = <20>;
+
+ mode {
+ label = "mode";
+ gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_LIGHTS_TOGGLE>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&gpio1 33 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ };
+ };
+
+ /* i2c of the left SFP cage: port 9 */
+ i2c0: i2c-gpio-0 {
+ compatible = "i2c-gpio";
+ sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&gpio1 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ i2c-gpio,delay-us = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ sfp0: sfp-p9 {
+ compatible = "sff,sfp";
+ i2c-bus = <&i2c0>;
+ los-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpio = <&gpio1 8 GPIO_ACTIVE_LOW>;
+ tx-disable-gpio = <&gpio1 11 GPIO_ACTIVE_HIGH>;
+ };
+
+ /* i2c of the right SFP cage: port 10 */
+ i2c1: i2c-gpio-1 {
+ compatible = "i2c-gpio";
+ sda-gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ scl-gpios = <&gpio1 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+ i2c-gpio,delay-us = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ sfp1: sfp-p10 {
+ compatible = "sff,sfp";
+ i2c-bus = <&i2c1>;
+ los-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
+ tx-disable-gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&gpio0 {
+ indirect-access-bus-id = <0>;
+};
+
+&gpio1 {
+ status = "okay";
+};
+
+&spi0 {
+ status = "okay";
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x00000000 0x80000>;
+ read-only;
+ };
+ partition@80000 {
+ label = "u-boot-env";
+ reg = <0x00080000 0x40000>;
+ read-only;
+ };
+ partition@c0000 {
+ label = "u-boot-env2";
+ reg = <0x000c0000 0x40000>;
+ };
+ partition@100000 {
+ label = "firmware";
+ compatible = "denx,uimage";
+ reg = <0x00100000 0xe80000>;
+ };
+ partition@f80000 {
+ label = "kernel2";
+ reg = <0x00f80000 0x180000>;
+ };
+ partition@1100000 {
+ label = "rootfs2";
+ reg = <0x01100000 0xd00000>;
+ };
+ partition@1e00000 {
+ label = "jffs2";
+ reg = <0x01e00000 0x200000>;
+ };
+ };
+ };
+};
+
+ðernet0 {
+ mdio: mdio-bus {
+ compatible = "realtek,rtl838x-mdio";
+ regmap = <ðernet0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ INTERNAL_PHY(8)
+ INTERNAL_PHY(9)
+ INTERNAL_PHY(10)
+ INTERNAL_PHY(11)
+ INTERNAL_PHY(12)
+ INTERNAL_PHY(13)
+ INTERNAL_PHY(14)
+ INTERNAL_PHY(15)
+ INTERNAL_PHY(24)
+ INTERNAL_PHY(26)
+ };
+};
+
+&switch0 {
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ SWITCH_PORT(8, 1, internal)
+ SWITCH_PORT(9, 2, internal)
+ SWITCH_PORT(10, 3, internal)
+ SWITCH_PORT(11, 4, internal)
+ SWITCH_PORT(12, 5, internal)
+ SWITCH_PORT(13, 6, internal)
+ SWITCH_PORT(14, 7, internal)
+ SWITCH_PORT(15, 8, internal)
+ SWITCH_SFP_PORT(24, 9, rgmii-id)
+ SWITCH_SFP_PORT(26, 10, rgmii-id)
+
+ port@28 {
+ ethernet = <ðernet0>;
+ reg = <28>;
+ phy-mode = "internal";
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+};
+
+&switch0 {
+ ports {
+ port@24 {
+ sfp = <&sfp0>;
+ };
+
+ port@26 {
+ sfp = <&sfp1>;
+ };
+ };
+};
diff --git a/target/linux/realtek/image/Makefile
b/target/linux/realtek/image/Makefile
index 5900750797e8..727f7bfa4164 100644
--- a/target/linux/realtek/image/Makefile
+++ b/target/linux/realtek/image/Makefile
@@ -60,6 +60,14 @@ define Device/d-link_dgs-1210-10p
endef
TARGET_DEVICES += d-link_dgs-1210-10p
+define Device/d-link_dgs-1210-10p-r1
+ $(Device/d-link_dgs-1210)
+ DEVICE_MODEL := DGS-1210-10P-R1
+ # for rtl83xx-poe
+ DEVICE_PACKAGES += libubox-lua libubus-lua libuci-lua lua-rs232
+endef
+TARGET_DEVICES += d-link_dgs-1210-10p-r1
+
define Device/d-link_dgs-1210-16
$(Device/d-link_dgs-1210)
DEVICE_MODEL := DGS-1210-16
--
2.17.1
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