These have made their way into -next.
Signed-off-by: Christian Lamparter <chunk...@gmail.com>
---
...dts-BCM5301X-Specify-uart2-in-the-DT.patch | 37 +++++++++++++++++++
...dts-BCM5301X-Specify-pcie2-in-the-DT.patch | 33 +++++++++++++++++
2 files changed, 70 insertions(+)
create mode 100644
target/linux/bcm53xx/patches-5.4/034-v5.10-ARM-dts-BCM5301X-Specify-uart2-in-the-DT.patch
create mode 100644
target/linux/bcm53xx/patches-5.4/035-v5.10-ARM-dts-BCM5301X-Specify-pcie2-in-the-DT.patch
diff --git
a/target/linux/bcm53xx/patches-5.4/034-v5.10-ARM-dts-BCM5301X-Specify-uart2-in-the-DT.patch
b/target/linux/bcm53xx/patches-5.4/034-v5.10-ARM-dts-BCM5301X-Specify-uart2-in-the-DT.patch
new file mode 100644
index 0000000000..1fec981146
--- /dev/null
+++
b/target/linux/bcm53xx/patches-5.4/034-v5.10-ARM-dts-BCM5301X-Specify-uart2-in-the-DT.patch
@@ -0,0 +1,37 @@
+From 95c1f0076303922ca401851b6605dc17eb0eb732 Mon Sep 17 00:00:00 2001
+From: Christian Lamparter <chunk...@gmail.com>
+Date: Wed, 6 Jun 2018 21:57:15 +0200
+Subject: [PATCH 1/4] ARM: dts: BCM5301X: Specify uart2 in the DT
+
+The BCM53016 in the Meraki MR32 utilizes the third "uart2"
+to connect to a on-board Bluetooth-LE 4.0 BCM20732 chip.
+
+Signed-off-by: Christian Lamparter <chunk...@gmail.com>
+Reviewed-by: Scott Branden <scott.bran...@broadcom.com>
+---
+ arch/arm/boot/dts/bcm5301x.dtsi | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
+index 45cd8c7411dd..eb1290fed235 100644
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -392,6 +392,15 @@ usb3_dmp: syscon@18105000 {
+ reg = <0x18105000 0x1000>;
+ };
+
++ uart2: serial@18008000 {
++ compatible = "ns16550a";
++ reg = <0x18008000 0x20>;
++ clocks = <&iprocslow>;
++ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
++ reg-shift = <2>;
++ status = "disabled";
++ };
++
+ i2c0: i2c@18009000 {
+ compatible = "brcm,iproc-i2c";
+ reg = <0x18009000 0x50>;
+--
+2.28.0
+
diff --git
a/target/linux/bcm53xx/patches-5.4/035-v5.10-ARM-dts-BCM5301X-Specify-pcie2-in-the-DT.patch
b/target/linux/bcm53xx/patches-5.4/035-v5.10-ARM-dts-BCM5301X-Specify-pcie2-in-the-DT.patch
new file mode 100644
index 0000000000..d4ec31c0ae
--- /dev/null
+++
b/target/linux/bcm53xx/patches-5.4/035-v5.10-ARM-dts-BCM5301X-Specify-pcie2-in-the-DT.patch
@@ -0,0 +1,33 @@
+From 5abb709b027a6234c135843764bad383be264162 Mon Sep 17 00:00:00 2001
+From: Christian Lamparter <chunk...@gmail.com>
+Date: Sun, 10 Jun 2018 17:17:53 +0200
+Subject: [PATCH 2/4] ARM: dts: BCM5301X: Specify pcie2 in the DT
+
+The SoC supports three pcie ports. Currently, only
+pcie0 and pcie1 are enabled. This patch adds the
+pcie2 port as well.
+
+Signed-off-by: Christian Lamparter <chunk...@gmail.com>
+Reviewed-by: Scott Branden <scott.bran...@broadcom.com>
+---
+ arch/arm/boot/dts/bcm5301x.dtsi | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
+index eb1290fed235..9d9e8fe3f6ae 100644
+--- a/arch/arm/boot/dts/bcm5301x.dtsi
++++ b/arch/arm/boot/dts/bcm5301x.dtsi
+@@ -252,6 +252,10 @@ pcie1: pcie@13000 {
+ reg = <0x00013000 0x1000>;
+ };
+
++ pcie2: pcie@14000 {
++ reg = <0x00014000 0x1000>;
++ };
++
+ usb2: usb2@21000 {
+ reg = <0x00021000 0x1000>;
+
+--
+2.28.0
+
--
2.28.0
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