Hi André,
On Wed, Apr 8, 2020 at 9:13 AM Andre Valentin <avalen...@marcant.net> wrote: > > Hi Sergio! > > Am 08.04.20 um 06:28 schrieb Sergio Paracuellos: > > Hi Andre, > > > > On Tue, Apr 7, 2020 at 9:28 PM Andre Valentin <avalen...@marcant.net> wrote: > >> > >> Am 07.04.20 um 20:05 schrieb Sergio Paracuellos: > >>> Hi, > >>> > >>> On Tue, Apr 7, 2020 at 12:16 PM Chuanhong Guo <gch981...@gmail.com> wrote: > >>>> > >>>> [CC Sergio who worked on upstream PCIE driver] > >>>> > >>>> On Tue, Apr 7, 2020 at 4:45 PM Andre Valentin <avalen...@marcant.net> > >>>> wrote: > >>>>> > >>>>> Hi! > >>>>> > >>>>> Currently I'm having some serious problems with the new 5.4 port. > >>>>> 1) PCIe > >>>>> I'm developing on the ZyXEL LTE3301-PLUS. It has PCIe and a mt7615e > >>>>> connected to second bus on the first phy. > >>>>> If booting the device, kernel hangs with a RST message, telling the > >>>>> device is not detected. It seems the PCIe bus 1 > >>>>> cannot be reseted because nothing is connected to bus 0. > >>>>> An upport of the old PCI driver reenables the function. I can provide > >>>>> more logs on this if needed. > >>> > >>> Logs and dmesg traces are always welcome and would be helpful. Both > >>> working and not working traces. > >> > >> Of course, here we go with the old PCIe driver taken from 4.14 openwrt > >> kernel: > >> [ 0.485729] pinctrl core: add 0 pinctrl maps > >> [ 0.485865] pull PCIe RST: RALINK_RSTCTRL = 4000000 > >> [ 0.796015] release PCIe RST: RALINK_RSTCTRL = 7000000 > >> [ 0.806088] ***** Xtal 40MHz ***** > >> [ 0.812829] release PCIe RST: RALINK_RSTCTRL = 7000000 > >> [ 0.823025] Port 0 N_FTS = 1b102800 > >> [ 0.829933] Port 1 N_FTS = 1b105000 > >> [ 0.836849] Port 2 N_FTS = 1b102800 > >> [ 1.995991] PCIE0 no card, disable it(RST&CLK) > >> [ 2.004682] PCIE2 no card, disable it(RST&CLK) > >> [ 2.013495] -> 20107f2 > >> [ 2.018328] PCIE1 enabled > >> [ 2.023532] PCI host bridge /pcie@1e140000 ranges: > >> [ 2.033045] MEM 0x0000000060000000..0x000000006fffffff > >> [ 2.043401] IO 0x000000001e160000..0x000000001e16ffff > >> [ 2.053762] PCI coherence region base: 0xbfbf8000, mask/settings: > >> 0x60000000 > >> [ 2.091056] PCI host bridge to bus 0000:00 > >> [ 2.099131] pci_bus 0000:00: root bus resource [mem > >> 0x60000000-0x6fffffff] > >> [ 2.112734] pci_bus 0000:00: root bus resource [io 0xffffffff] > >> [ 2.124486] pci_bus 0000:00: root bus resource [??? 0x00000000 flags > >> 0x0] > >> [ 2.137962] pci_bus 0000:00: No busn resource found for root bus, will > >> use [bus 00-ff] > >> [ 2.153766] pci 0000:00:00.0: [0e8d:0801] type 01 class 0x060400 > >> [ 2.165651] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x7fffffff] > >> [ 2.178057] pci 0000:00:00.0: reg 0x14: [mem 0x60100000-0x6010ffff] > >> [ 2.190585] pci 0000:00:00.0: supports D1 > >> [ 2.198439] pci 0000:00:00.0: PME# supported from D0 D1 D3hot > >> [ 2.211463] random: fast init done > >> [ 2.211838] pci 0000:01:00.0: [14c3:7615] type 00 class 0x000280 > >> [ 2.230071] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x000fffff > >> 64bit] > >> [ 2.243675] pci 0000:01:00.0: 2.000 Gb/s available PCIe bandwidth, > >> limited by 2.5 GT/s x1 link at 0000:00:00.0 (capable of 4.000 Gb/s with 5 > >> GT/s x1 link) > >> [ 2.272296] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 > >> [ 2.285339] pci_bus 0000:00: busn_res: [bus 00-ff] end is updated to 01 > >> [ 2.298493] pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000] > >> [ 2.311581] pci 0000:00:00.0: BAR 0: failed to assign [mem size > >> 0x80000000] > >> [ 2.325410] pci 0000:00:00.0: BAR 8: assigned [mem > >> 0x60000000-0x600fffff] > >> [ 2.338888] pci 0000:00:00.0: BAR 1: assigned [mem > >> 0x60100000-0x6010ffff] > >> [ 2.352376] pci 0000:01:00.0: BAR 0: assigned [mem > >> 0x60000000-0x600fffff 64bit] > >> [ 2.366887] pci 0000:00:00.0: PCI bridge to [bus 01] > >> [ 2.376728] pci 0000:00:00.0: bridge window [mem > >> 0x60000000-0x600fffff] > >> > >> > >> And this is on 5.4 with the new driver with pcie0 status=disabled: > >> [ 30.464407] mt7621-pci 1e140000.pcie: GPIO lookup for consumer reset > >> [ 30.464415] mt7621-pci 1e140000.pcie: using device tree for GPIO lookup > >> [ 30.464474] mt7621-pci 1e140000.pcie: using lookup tables for GPIO > >> lookup > >> [ 30.464484] mt7621-pci 1e140000.pcie: No GPIO consumer reset found > >> [ 30.664239] mt7621-pci 1e140000.pcie: pcie1 no card, disable it (RST & > >> CLK) > >> [ 30.678128] mt7621-pci 1e140000.pcie: Nothing is connected in virtual > >> bridges. Exiting... > >> booting goes on. > >> > >> And with pcie status=enabled: > >> [ 32.415863] rt2880-pinmux pinctrl: pcie is already enabled > >> [ 32.426821] mt7621-pci 1e140000.pcie: Error applying setting, reverse > >> things back > >> [ 32.441900] mt7621-pci-phy 1e149000.pcie-phy: PHY for 0xbe149000 (dual > >> port = 1) > >> [ 32.456880] mt7621-pci-phy 1e14a000.pcie-phy: PHY for 0xbe14a000 (dual > >> port = 0) > >> [ 32.571556] mt7621-pci-phy 1e149000.pcie-phy: Xtal is 40MHz > >> [ 32.582680] mt7621-pci-phy 1e14a000.pcie-phy: Xtal is 40MHz > >> [ 32.693592] mt7621-pci 1e140000.pcie: pcie0 no card, disable it (RST & > >> CLK) > >> hangs. > > > > I think the problem here is that upstream driver use two phy's nodes > > with pcie-phy0 being a dual ported one. > > Because there is nothing connected in pcie0 the phy is just stopped > > assuming nothing will be connected also in pcie1. > > Just to see if that is the problem, can you please patch the > > 'mt7621_pcie_init_ports' function and comment the following piece of > > code: > > > > if (slot != 1) > > phy_power_off(port->phy); > > > > Let's see what happens. > > Hmm, that did the trick: > [ 30.444228] rt2880-pinmux pinctrl: found group selector 6 for pcie > [ 30.444249] rt2880-pinmux pinctrl: request pin 19 (io19) for 1e140000.pcie > [ 30.444396] mt7621-pci 1e140000.pcie: Parsing DT failed > [ 32.403940] rt2880-pinmux pinctrl: found group selector 6 for pcie > [ 32.403963] rt2880-pinmux pinctrl: request pin 19 (io19) for 1e140000.pcie > [ 32.403977] rt2880-pinmux pinctrl: pcie is already enabled > [ 32.414931] mt7621-pci 1e140000.pcie: Error applying setting, reverse > things back > [ 32.430012] mt7621-pci-phy 1e149000.pcie-phy: PHY for 0xbe149000 (dual > port = 1) > [ 32.444754] mt7621-pci 1e140000.pcie: GPIO lookup for consumer reset > [ 32.444763] mt7621-pci 1e140000.pcie: using device tree for GPIO lookup > [ 32.444811] of_get_named_gpiod_flags: parsed 'reset-gpios' property of > node '/pcie@1e140000[0]' - status (0) > [ 32.444875] mt7621-pci 1e140000.pcie: GPIO lookup for consumer reset > [ 32.444883] mt7621-pci 1e140000.pcie: using device tree for GPIO lookup > [ 32.444906] of_get_named_gpiod_flags: can't parse 'reset-gpios' property > of node '/pcie@1e140000[1]' > [ 32.444924] of_get_named_gpiod_flags: can't parse 'reset-gpio' property of > node '/pcie@1e140000[1]' > [ 32.444935] mt7621-pci 1e140000.pcie: using lookup tables for GPIO lookup > [ 32.444945] mt7621-pci 1e140000.pcie: No GPIO consumer reset found > [ 32.445011] mt7621-pci-phy 1e14a000.pcie-phy: PHY for 0xbe14a000 (dual > port = 0) > [ 32.459753] mt7621-pci 1e140000.pcie: GPIO lookup for consumer reset > [ 32.459761] mt7621-pci 1e140000.pcie: using device tree for GPIO lookup > [ 32.459791] of_get_named_gpiod_flags: can't parse 'reset-gpios' property > of node '/pcie@1e140000[2]' > [ 32.459808] of_get_named_gpiod_flags: can't parse 'reset-gpio' property of > node '/pcie@1e140000[2]' > [ 32.459818] mt7621-pci 1e140000.pcie: using lookup tables for GPIO lookup > [ 32.459826] mt7621-pci 1e140000.pcie: No GPIO consumer reset found > [ 32.559695] mt7621-pci-phy 1e149000.pcie-phy: Xtal is 40MHz > [ 32.570819] mt7621-pci-phy 1e14a000.pcie-phy: Xtal is 40MHz > [ 32.681732] mt7621-pci 1e140000.pcie: pcie0 no card, disable it (RST & CLK) > [ 32.695603] mt7621-pci 1e140000.pcie: pcie2 no card, disable it (RST & CLK) > [ 32.709477] mt7621-pci 1e140000.pcie: PCIE1 enabled > [ 32.719207] mt7621-pci 1e140000.pcie: PCI coherence region base: > 0x60000000, mask/settings: 0xf0000002 > [ 32.737964] mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00 > [ 32.750653] pci_bus 0000:00: root bus resource [io 0x1e160000-0x1e16ffff] > [ 32.764358] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff] > [ 32.778073] pci_bus 0000:00: root bus resource [bus 00-ff] > [ 32.789053] pci 0000:00:00.0: [0e8d:0801] type 01 class 0x060400 > [ 32.801064] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x7fffffff] > [ 32.813561] pci 0000:00:00.0: reg 0x14: [mem 0x00000000-0x0000ffff] > [ 32.826152] pci 0000:00:00.0: supports D1 > [ 32.834144] pci 0000:00:00.0: PME# supported from D0 D1 D3hot > [ 32.846953] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), > reconfiguring > [ 32.863173] pci 0000:01:00.0: [14c3:7615] type 00 class 0x000280 > [ 32.875209] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x000fffff 64bit] > [ 32.888911] pci 0000:01:00.0: 2.000 Gb/s available PCIe bandwidth, limited > by 2.5 GT/s x1 link at 0000:00:00.0 (capable of 4.000 Gb/s with 5 GT/s x1 > link) > [ 32.917782] pci 0000:00:00.0: PCI bridge to [bus 01-ff] > [ 32.928208] pci 0000:00:00.0: bridge window [io 0x0000-0x0fff] > [ 32.940355] pci 0000:00:00.0: bridge window [mem 0x00000000-0x000fffff] > [ 32.953890] pci 0000:00:00.0: bridge window [mem 0x00000000-0x000fffff > pref] > [ 32.968289] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 > [ 32.981535] pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000] > [ 32.994721] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000] > [ 33.008598] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff] > [ 33.022134] pci 0000:00:00.0: BAR 9: assigned [mem 0x60100000-0x601fffff > pref] > [ 33.036535] pci 0000:00:00.0: BAR 1: assigned [mem 0x60200000-0x6020ffff] > [ 33.050082] pci 0000:00:00.0: BAR 7: assigned [io 0x1e160000-0x1e160fff] > [ 33.063622] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff > 64bit] > [ 33.078208] pci 0000:00:00.0: PCI bridge to [bus 01] > [ 33.088106] pci 0000:00:00.0: bridge window [io 0x1e160000-0x1e160fff] > [ 33.101640] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff] > [ 33.115169] pci 0000:00:00.0: bridge window [mem 0x60100000-0x601fffff > pref] > [ 45.990931] pci 0000:00:00.0: enabling device (0004 -> 0007) > > > It works, yeah! But what now? Do you fix the driver? When I can help/test .. I'll try to fix this properly and send a patch to staging list during this week (I have to think what should be the way to properly fix this first :)). BTW, I don't like your dmesg Gpio's messages... Looks that something else is wrong. > > Thanks, > > André > Best regards, Sergio Paracuellos _______________________________________________ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel