On 8/9/19 7:14 AM, Koen Vandeputte wrote:

On 09.08.19 15:31, Koen Vandeputte wrote:

On 09.08.19 14:48, Ben Greear wrote:
On 8/6/19 2:26 AM, Koen Vandeputte wrote:

Hi Ben,

I finally managed to get to some time to properly take a look using a simple 
setup.

Attached all required files to simulate the issue.

I compiled the latest OpenWrt master state, (included a full wpa_supplicant and 
iperf tools) and ran the 2 starts.

Attached also logs as seen from both boards simultaneously.


basically:

- If the boards finally do link after lots of tries, it will have a >200ms 
latency and max speed of about 3Mbit.

- The wpa_sup config file is the most basic RSN enabled config.

- I also tried the current Master state with/without all custom pathes, but the 
result is the same.

- wpa_supp also nags about some missing IE's


Hw used:

- 2x RB-922UAGS containing a on-board ar988x, capable of 30dBm.

- 2x standard 5GHz omni antennae

- board seperation distance ca 6ft

Can you reproduce without encryption enabled?  That makes it easier to debug
packet sniffs.

If you just run ping traffic (or very slow speed tcp/udp), do you still see the 
issues (like high
latency, packet loss, poor on-air encoding rates, etc)?

currently rebuilding the setup. will get back on this asap.
If I build you a debugging firmware, are you able and willing to reproduce the 
problem and
send me dmesg output as well as on-air packet sniff?
Very sure!

Preferably, with generated traffic with unique packet sizes (ie, ever 
increasing, random, or something like
that, so I can more easily match up on-air frames with the debugging output.


I believe that the beacon issues are probably a symptom of some other failure 
in the transmit and/or
receive path.

Thanks,
Ben

Lets get this fixed! :-)

Koen


Just tested with encryption disabled:

summary:

- speed is looking good. (~130Mbit/s) also link speed is 866Mbit (2x2 radio)

- iw wlan0 confirms 80MHz channel

- Only a single splat seen, no beacon errors

- non-htt firmware


Please see this bug I opened to track this.  It has a firmware debugging image.
In case it crashes on FW load, we will have to create and tweak a fwcfg file
to decrease number of vdevs, peers, etc since the debugging code uses a lot of
instruction space.

https://github.com/greearb/ath10k-ct/issues/88

Thanks,
Ben

--
Ben Greear <gree...@candelatech.com>
Candela Technologies Inc  http://www.candelatech.com


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